7th MicroTCA Workshop for Industry and Research

Europe/Berlin
CFEL (DESY)

CFEL

DESY

Building 99, Notkestraße 85, 22607 Hamburg
Holger Schlarb (DESY), Kay Rehlich (DESY), Thomas Walter (DESY)
Description

The 7th MicroTCA Workshop for Industry and Research will take place from 5 - 6 December 2018 at DESY in Hamburg, Germany. Pre-Workshops take place on 4 December.

The MicroTCA Technology Lab warmly invites you to participate in this workshop!

The registration fee per person including coffee and lunch breaks, DESY tour, workshop dinner and workshop materials is 190 Euro.

 

 

Support: mtca-ws

 

    • Registration CFEL

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    • Introduction & Welcome CFEL

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    • Session 1 CFEL

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      Chair: tbd

      • 1
        Tim Wilksen - The MicroTCA-Based Accelerator Control System For The European XFEL - First Experiences With A Production System
        The MicroTCA-based Accelerator Control System for the European XFEL has been in operation as a production system since more than one and half a year now. A brief review and some experiences with focus on the used MicroTCA technology will be presented. Nowadays available hardware and software implementations using the MicroTCA platform however might not be sufficient to cope with higher data rates expected with future upgrades to the European XFEL accelerator facility. In the context of modern data management and and analysis methods some ideas and requirements to enhance current concepts of a MicroTCA-based accelerator control system will be discussed.
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      • 2
        Tobias Hoffmann - FAIR Beam Instrumentation Goes MTCA
        While the construction site of the Facility for Antiproton and Ion Research (FAIR) takes shape, the design and set-up of the required beam instrumentation systems is making big progress. At the small Cryring - the test bed for FAIR control system and accelerator component evaluation - the readout of ten beam position monitors with open hardware based FMC ADCs has been implemented. This fully leverages the speed of MTCA and the possibility to distribute trigger signals via the backplane and is currently being commissioned. MTCA is also part of the beam instrumentation upgrade of the beamlines for SIS and ESR. Here counter applications for beam loss monitors and fluorescent screen readout via GigE-cameras have been implemented in MTCA. Together with a brief status of the FAIR project an overview of these and future applications will be presented.
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      • 3
        Torsten Bluhm - MTCA.4 at Wendelstein 7-X
        Wendelstein 7-X is a scientific research facility that tries to investigate the basics of a power plant based on nuclear fusion. As the worlds largest experiment of type "Stellarator" it uses a single optimized system of magnetic coils to confine the plasma. This allows continuous operation as required for a power plant in a more simple way than other fusion devices. In order to observe the plasma and retrieve information about its behavior under varying conditions different measurement methods are used. These methods are implemented by a number of diagnostic installations using various data acquisition platforms including MTCA.4 and ATCA. The presentation will show a few diagnostic examples that use MTCA.4 and ATCA hardware. Furthermore, an outlook of the required hardware support in respect to MTCA.4 for future operation of Wendelstein 7-X will be given.
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    • Coffee Break & Posters CFEL

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    • Session 2 CFEL

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      • 4
        Saeed Karamooz - MicroTCA growth
        MicroTCA continues to develop and to be adopted worldwide across a huge range of applications. While some early adopters dropped out of the market, impacting vendor choice, those that remained have seen significant growth. Increased capability, in part driven by enhancements such as MTCA.4 and MTCA.4.1, has allowed MicroTCA to address markets far from its initial roots in telecommunication. A brief sampling of successful deployments shows the architecture to be far more flexible - and certainly more widely used - than many in the industry recognise. The standard represents a highly profitable business opportunity for embedded computer manufacturers, and forthcoming speed and power improvements will enhance capability further and drive growth.
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      • 5
        Paolo Scarbolo - MTCA.4 Applications for Accelerators: Machine Protection System and Beam Stabilization Exploiting DAMC-FMC25
        This contribution aims to show how MTCA.4 is used for the development of accelerator systems for diagnostics and beam stabilization exploiting the DAMC-FMC25 AMC carrier board features. We present the system architecture and the final application of a Machine Protection System (MPS) and a Beam Stabilization System (BSS) in research facilities. The MPS is composed by a control board that communicates with multiple AMC-PICO-8 8-channel picoammeters developed by CAEN ELS. The AMC-PICO-8 stores acquired data buffer up to 1 Msps and sends MPS signals back to the control board upon specific over-threshold conditions. The BSS elaborates the information received from a position detector via the FMC-PICO-1M4 picoammeter front-end, performs the feedback controller computations and sends the correction signals directly to the FAST-PS power supplies equipped with fast low-latency SFP interfaces. The communications with backplane (PCIe) and FMC modules (SPI) and all the high demanding computations are handled by the FPGA available on the DAMC-FMC25.
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      • 6
        Christian Ganninger - New, small size MicroTCA.4 Crates
        Applications often demand the maximum MicroTCA configuration of 12 AMC’s plus RTM’s, but in some cases, like for decentralized control functions or for evaluations in the lab, a lower number of AMC’s is required and therefore a smaller size crate solution is desired. This presentation explains the technical features of the new nVent SCHROFF 3U Crate with front to rear cooling as well as the features of a new 1U MTCA.4 crate, which will be released in Q1 / 2019.
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      • 7
        Hector Betancourt - The MTCA Configurator tool
        The MTCA Techlab configurator is a powerful, but easy tool for users without previous experience, where users can create their system according to the needs required for their projects. With this tool users can select from chassis, CPU, power Supply and a wide variety of mezzanine cards for different applications. This presentation will show how the principle of the configurator works.
      • 8
        Matthias Kirsch - MTCA/MTCA.4 boards for applications at FAIR
        With the European XFEL in standard user operation GSI’s FAIR accelerator complex is Germany’s next ambitious accelerator project. Several boards were developed to cover beam instrumentation applications in combination with existing designs. The Kintex Ultrascale based SIS8160 MTCA dual FMC carrier with the SFMC01 dual 2.5 GSPS 14-bit JESD digitizer FMC will be presented and the FCT readout application highlighted. A single cavity LLRF solution based on the SIS8300-KU MTCA.4 125 MSPS 16-bit digitizer AMC with the DS8VM1 direct sampling/vector modulator RTM is under evaluation for use in the UNILAC injector. The Artix based 64 channel SIS8864 LVTTL digital I/O AMC will be used for amplifier settings under optional event receiver control and generic applications.
    • Lunch CFEL

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    • DESY Tour CFEL

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    • Session 3 CFEL

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      • 9
        Ivan Garcia - Overview of the IOxOS MicroTCA ecosystem
        IOxOS Technologies, a Swiss electronic design company specialized in the development of COTS for Real-Time control systems, presents their ecosystem of MicroTCA products, the main reasons for its development, its advantages and some use cases showing how this MicroTCA ecosystem is being used and deployed in accelerators and large experimental physics facilities
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      • 10
        Vollrath Dirksen - Up to 48 GigE-Vision Cameras benefitting from the MicroTCA architecture
        It's time to bring the advantages of MicroTCA architecture to the image processing market. The solutions for image processing seem to cover all market requirements. They are PC based or embedded or centralised or de-centralised etc. In this presentation the due to its endless scalability known GigE-Vision cameras are selected to show how unsolved image processing problems can be addressed by the modular architecture and the scalability of MicroTCA.0 and MicroTCA.4 systems. Questions are answered, - how to aggregate the raw data amount of 48 GigE-Vision cameras inside one MicroTCA system, - how to scale and synchronise multiple MicroTCA systems full of camera links - how to combine GigE-Vision cameras with camera-link-cameras - how to accelerate standard image processing tools on block level by using FPGAs This presentation is second by vision presentation of Desy MicroTCA Techlab and Powerbridge. Also have a look about "Image Processing in Banknote Printing Applications, Technology and Trends" from the MTCA Workshop 2016 presented by Carsten DIEDERICHS (KBA-NotaSys AG & Co. KG) at https://indico.desy.de/indico/event/15974/session/2/contribution/50/material/slides/0.pptx
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      • 11
        Jan Marjanovic - MicroTCA Technology Lab at DESY: Summary of 1st Year Operations
        The MicroTCA Technology Lab (A Helmholtz Innovation Lab) at DESY officially opened in April this year. The Lab provides an "enabling space" for a wide spectrum of interactions with industry, with a particular focus on client relationships around: - New developments in MicroTCA.4 (hardware, firmware, software), - High- end test and measurement services, - Consulting and system integration projects. We report on completed and ongoing projects, highlight intermediate development results and provide an outlook for the coming years.
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      • 12
        Eric Breeding - MicroTCA Real-time Monitoring of Injection Kicker Magnets Performs Critical Interlock for High-Power Operation of the Spallation Neutron Source
              The Spallation Neutron Source is a 1.4 MW pulsed neutron source which uses an H- beam accelerator, accumulator ring and Hg target. The proton beam is painted in the accumulator ring for optimum phase space via two sets of the injection kickers, a set of four for each for each plane. The accumulator ring compresses the 1 ms pulse to 650 ns for delivery onto target.       The previous implementation of the Injection Kicker Waveform Monitor used a set of 5 Oscilloscopes. While this implementation the required function; the data was not real time, the scopes were out of production and a loss of the monitoring system would require halting operations.       The new MicroTCA implementation is based upon the VadaTech AMC502 with two custom FMCs. One FMC provides an interface to the SNS timing and machine protection systems, and the other provides an 8 channel 2.5 MSPS ADC. This system provides real time full length waveforms via a dual channel DMA over PCIe for all 8 channels at 60 Hz.
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      • 13
        Jan-Erik Eklund - Digitizer control software for large installations
        We are presenting a new software for controlling large arrays of digitizers. The prototype software can control multiple digitizers in multiple chassis. The different chassis can be spaced far away from each other and linked via Ethernet. In relation to that we also present a trigger distribution method for large array installations. The trigger method is demonstrated on the new 8 channels digitizer ADQ8.
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      • 14
        Karl Judex - New Solutions for Leading Edge Data Aquisition
        Today many applications need data aquisition systems with many channels, high sampling rates and high resolution including high performance processing. This presentation shows new available leading edge and multi-channel DAQ solutions for MicroTCA platforms based on high performance FPGAs and RFSoCs and high bandwidth NVMe storage solutions.
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    • Coffee Break CFEL

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    • Session 4 CFEL

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      • 15
        Timo Korhonen - ESS: status and developments
        **ESS will be the next major deployment of MTCA.4 systems. We are building on the work that has been done in the community, notably the pioneering work at DESY for the European XFEL. As a green field project, we at ESS do not (yet) have a large group of in-house developers but have to rely on in-kind partners and commercial suppliers. Nevertheless, we want to solidify the MTCA.4 standard and its viability as the primary platform for high-performance systems in large scientific projects. The outreach of ESS with many collaborating partner laboratories gives us possibilities to do that. The talk will give an overview of the ESS palette of MTCA.4 systems and our applications. Also some initiatives to prepare for the future will be discussed. **
        Slides
      • 16
        Ursa Rojec - Integration of MTCA.4 components in medical and scientific applications
        The article makes an overview of efforts made in scientific as well as medical applications based on MTCA.4 platform. In scientific, the focus is mainly on generalizing diagnostic and LLRF applications, based on various DAQ boards available on the market. In the medical field, the presented use-case is a Dose Delivery System, where the utilization of FMC carrier boards for device-specific interfaces and backplane connections for safe and redundant interlocking lead to a safe and rugged design. The article also dives into best practices identified while integrating aforementioned systems. Both software and firmware aspect of such integration and how leveraging MTCA.4 properties such as modularity and the use of RTMs can have a positive impact on reducing development as well as maintenance effort. By choosing the right approach when devising software and firmware architecture, one can use same hardware and software components for different applications, additionally resulting in fewer items that need to be kept on stock for emergency repairs.
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      • 17
        Dariusz Makowski - Overview of DMCS Projects and MicroTCA.4 Developments
        The Lodz University of Technology, Department of Microelectronics and Computer Science is involved in the development of MicroTCA.4 and MicroTCA.4.1 standards from 2007 onwards. Since that time, we developed various MicroTCA.4 components including Intelligent Platform Management, Advanced Mezzanine Cards, Rear Transition Modules for data acquisition and processing systems used in numerous accelerators and fusion projects. The presentation will discuss the history of developments and new ideas for Intelligent Platform Management of Advanced Mezzanine Cards, Rear Transition Modules and FPGA Mezzanine Cards in AdvancedTCA and MicroTCA systems. The high-power piezo driver HPD-200 designed for the European Spallation Source accelerator will be presented as an example of challenging development breaking the limitations of MicroTCA specification. The device is suitable for driving piezo actuators used to compensate the Lorenz force detuning for both elliptical and spoke cavities. Finally, an universal and flexible framework, based on MicroTCA.4, will be presented as an example of powerful image acquisition and processing system dedicated for large-scale physics projects.
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      • 18
        Günther Rehm - First projects at Diamond Light Source involving MTCA
        Diamond Light Source has used VME extensively in the past. However, it is becoming increasingly costly to maintain so for more recent developments in need of a high performance framework we have increasingly chosen MTCA. This talk will give a brief overview of the projects we have completed or are currently working on: Low Level RF control, bunch-by-bunch feedback, source feedback from X-rays at sample, and future orbit feedback controller.
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      • 19
        Martin Tolkiehn - MTCA in photon science
        Although the MTCA standard is well established for accelerator control systems, the control systems of most X-ray beamlines still rely on the outdated VME standard. I will present how this could be changed in the near future using existing and planned MTCA hardware and I will show some examples from beamline P24 at PETRA III.
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      • 20
        Michael Fenner - DESY MMC System-On-Module and its Applications
        Designing new hardware for MicroTCA comes with a significant challenge: Management functions required by the standard such as power and temperature control and supervision have to be implemented in hardware and in software. This takes resources away from the core development. Doing the management properly requires significant design time. Doing it on a too basic level (by i.e. not implementing temperature alerts, JTAG switch support or HPM update functionality) will lead to a lack of features that are required for maintenance and high reliability. In the past, DESY offered complete MMC source code (“MMC V1.00”) together with a complex hardware implementation proposal. This included a high number of features, but left the task of designing the MMC components into the target application plus customizing the management software on source-code level to the customer. With DESY's small-footprint MMC System-On-Module (29 x 25mm) developers now have the option to solder a ready-to-use LGA module into the target board (top or bottom side) . The highly integrated module is based on an ARM Cortex-M4 processor and a Lattice MachXO2 CPLD. It contains all hardware and software components necessary for powering and managing the complete MicroTCA board. It includes FPGA-firmware update over IPMI, JTAG and FPGA SPI Flash arbitration; PMBUS power control, temperature and voltage supervision and RTM management. The module, along with the pre-programmed MMC code, will be made commercially available soon. The talk presents details and the first two applications of the MMC module: It will be used on a ZYNQ Ultrascale+ FMC+ Carrier and a low-cost ZYNQ-7000 IO Board.
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    • Session 5 CFEL

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      • 21
        Dusan Slavinec - White Rabbit based AMC timing receiver card for GSI/FAIR
        GSI has chosen the White Rabbit based timing system for the FAIR facility. Cosylab has developed several form factors for the timing receivers, including MTCA receivers. The AMC board was recently approved for production by GSI. A key requirement to implement was that card is operational in MTCA.0, MTCA.4 crates and additionally in the LIBERA platform B, where it provides extra trigger lines to the backplane for Libera equipment. The project is based on the GSI PCIe form-factor. Cosylab developed schematics and iSystem did layout and production. The prototype boards were successfully tested and we are preparing the production of several hundred units. We will cover the project timeline in more detail, particularly about the microcontroller code for the MTCA management part and extra provisions for MTCA.4
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      • 22
        Jukka Pietarinen - Complete MRF Timing System on MicroTCA.4
        All major building blocks of the MRF Timing System are now available in the MicroTCA.4 form factor. This talk gives an overview of the MRF Timing System and also presents the Open Source Event Receiver that allows users to implement a MRF protocol compatible timing receiver on their own hardware.
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      • 23
        Heiko Körte - Redundant High Precision Timing Solution
        The NAMC-PTM holds all the logic that is needed to receive a clock or a pulse from a GPS receiver or the other MCH. The detection and the quality rating of these signals can also be done on the NAMC-PTM. In this scenario the NAT-MCH clock module is only used to buffer the generated clock signals and to distribute them to all AMCs via the backplane clocks. The first of the two NAMC-PTMs is capable of generating and providing two reference signals (e.g. 1pps and 120MHz) to the first MCH via CLK1-RX and CLK3-RX using its local TCLKA/B lines. The MCH will send these clocks to all other AMC, arriving at their TCLKA and TCLKB. The MCH sends also these clocks to the redundant NAMC-PTM via CLK1-TX and CLK3-TX arriving at the PTM at TCLKC/D. The second NAMC-PTM receives the clocks from the first NAMC-PTM via its TCLKC and TCLKD. It can decide at any time if it generates its clock locked to these clocks or locked to its own GPS reference.
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      • 24
        Sven Stubbe - Implementation of GigE Vision standard and applications in MicroTCA
        Camera-based solutions are commonly used in research and industrial automation in a wide variety of environments. High transfer rates and processing of large amounts of data with smallest possible latency are typical requirements. Applications range from basic inspection and diagnostic tasks to complex systems with multiple cameras in synchronization. Image processing algorithms can be implemented on different platforms: CPU, GPU, FPGA and DSP. GigE Vision standard, based on Gigabit Ethernet, is a popular choice in scientific community because of the possibility to use commercial network equipment. Presented here is an implementation of GigE Vision stack in FPGA on DAMC-TCK7 board. This way we manage to achieve very low and deterministic latency as well as high throughput, which is very valuable for certain applications. The solution is completed with graphical user interface and a server for various control systems. Current applications and possibilities for future will be presented.
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      • 25
        Ralf Waldt - Adapt Cabinet to Crate Cooling
        Efficient cooling of the Electronics in a MicroTCA crate requires evaluating many different parameters. The heat path starts at the hot spots on the AMC modules and ends up in the environmental air, sometimes even outside the building. Cooling efficiency of the MicroTCA crate is as important as the thermals inside the rack containing different heat exhausting units. All these elements have to be taken into consideration when defining the application and have to fit together for an optimized cooling solution. This presentation shows various thermal concepts and how they match to the installed MTCA.4 crates.
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      • 26
        Patrick Nonn - Overview and status of LLRF system developments at the MicroTCA Technology Lab
        One of the MicroTCA Technology Lab's roots is the design and implementation of Low Level RF (LLRF) systems for particle accelerators. We will present an update on the LLRF system for the Turkish Accelerator and Radiation Laboratory (TARLA) in Ankara, as well as a new project, in which we, in collaboration with Bevatec GmbH, provide a complete LLRF system for the Light Ion Injector (LILac) at the Nuclotron Based Ion Collider Facility (NICA) in Dubna, Russia. Both projects include hardware, firmware and software support, as well as training, to make sure customers can adapt MicroTCA.4 solutions with ease.
        Slides
    • Coffee Break & Posters CFEL

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    • Session 6 CFEL

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      • 27
        Adrian Mancuso - Structure determination and imaging at the European XFEL: First results and future opportunities
        Serial crystallography at X-ray Free Electron Lasers (XFELs)1 has proven to be a valuable addition to the array of structure determination techniques presently available, particularly for time-resolved studies involving either photo-sensitive systems2,3, radiation damage sensitive sample4 or potentially for systems involving the mixing of substrate with a system under study5. The European X-ray Free Electron Laser6 (EuXFEL) presents a new and expanded capability to perform serial crystallography and single particle imaging experiments. This is not just because additional XFEL sources create a higher availability of experimental time, but also because the European XFEL offers the highest repetition rate of XFEL pulses of all XFELs with orders more pulses per unit time. In this presentation I will outline the experimental capabilities of the Single Particles, Clusters and Biomolecules and Serial Femtosecond Crystallography (SPB/SFX) instrument7 of the EuXFEL, an instrument designed to predominantly support structural biology applications. I will show a selection of results from the first experiments at the EuXFEL which demonstrate that we can successfully exploit the Megahertz repetition rate of EuXFEL for both serial crystallography8,9 and for single particle imaging. Finally, I’ll give an outlook to future experiments that may be performed at the SPB/SFX instrument. Chapman, H. N. et al. Femtosecond X-ray protein nanocrystallography. Nature 470, 73 (2011). 2. Nango, E. et al. A three-dimensional movie of structural changes in bacteriorhodopsin. Science 354, 1552–1557 (2016). 3. Tenboer, J. et al. Time-resolved serial crystallography captures high-resolution intermediates of photoactive yellow protein. Science 346, 1242–1246 (2014). 4. Suga, M. et al. Native structure of photosystem II at 1.95 Å resolution viewed by femtosecond X-ray pulses. Nature 517, 99–103 (2014). 5. Schmidt, M. Mix and Inject: Reaction Initiation by Diffusion for Time-Resolved Macromolecular Crystallography. Advances in Condensed Matter Physics 2013, 1–10 (2013). 6. Tschentscher, T. et al. Photon Beam Transport and Scientific Instruments at the European XFEL. Applied Sciences 7, 592–35 (2017). 7. Mancuso, A. P., Reimers, N., Borchers, G., Aquila, A. & Giewekemeyer, K. Technical design report: Scientific instrument Single Particles, Clusters, and Biomolecules (SPB). (European XFEL, 2013). 8. Wiedorn, M., Oberthuer, D., et al, Nature Communications, accepted. 9. Grünbein, M., et al, Nature Communications, 9, 3487 (2018).
        Slides
      • 28
        Xinpeng Ma - Low level RF Applications based on MicroTCA.4 at IHEP
        Applications of the Low Level RF (LLRF) control system based on the MicroTCA.4 standard at IHEP within last years are presented. In the China-ADS project, the MicroTCA.4 hardware platform is used for the LLRF control of CW proton linac which includes 1 RFQ, 2 bunchers, 20 high-Q superconducting cavities within 3 Cryomodules. In the BEPC-II facility, it is used for Sub-Harmonic Bunchers and accelerating tubes of the normal conducting electron linac. The design, functions and performance of the MicroTCA.4 based LLRF system together with beam commissioning results will be shown.
        Slides
      • 29
        Kalus Zenker - Upgrade of the LLRF system at ELBE
        The upgrade of the Low Level Radio Frequency (LLRF) system at the superconducting linear accelerator ELBE is about to being finished. A digital system based on MTCA.4 has been implemented and is going to replace the analogue system which is in operation since 20 years by the end of 2018. The digital system is capable for continuous wave (CW) operation and single cavity control. The server application uses the open source project ChimeraTK and its OPC-UA adapter, that is based on the open source project open62541. This allows to integrate the digital LLRF into the existing ELBE control and machine protection system, that is based on a Siemens PLC (S7) infrastructure. Furthermore, the OPC-UA adapter of ChimeraTK allows to implement different additional clients of the ChimeraTK server application, such as the ELBE human machine interface used by the operators (WinCC, SCADA) or expert panels (e.g. LabView or Python). The talk summarizes first results of the full integration test including LLRF controller optimization and amplitude and phase noise measurements. Furthermore, latest developments of the OPC-UA adapter and contributions to ChimeraTK are presented.
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      • 30
        Johannes Zink - Direct Sampling of RF Signals up to 3 GHz in MTCA.4
        Sampling high bandwidth signals above 1 GHz in MTCA.4 on an AMC digitizer with an analog front end located on the RTM side, requires a new type of Zone3 connection. The analog classes based on differential pairs connectors suffer from intense cross talk if the signal frequency rises above 300 MHz. DESY is planning to introduce a new analog class based on single ended coaxial connectors between AMC and RTM. The first board using this new coaxial connectors will be the direct sampling digitizer DAMC-DS800. For evaluating and testing the concept of direct sampling in MTCA.4, DESY has built a cost efficient direct sampling FMC digitizer board. A new concept for an analog Zone3 class for MTCA.4 and the AMC/FMC digitizers will be presented.
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      • 31
        Nan Gan - Software and Hardware Development For the MicorTCA Based LLRF System at IHEP
        In the past few years, we have developed some software and hardware for the microTCA based LLRF system. The software consist of flexible LLRF firmware and top application. The LLRF firmware can realize various of functions including intra-pulse or inter-pulse feedback, feedforward compensation, data acquisition, etc., which makes it can be use in different application scenarios without modification. Some hardware including broad band RF front-end RTM, I/O expand RTM, timing modules have been designed. These software and hardware will be used in the In the future projects including high-energy photon source (HEPS).
        Slides
    • Lunch CFEL

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      Building 99, Notkestraße 85, 22607 Hamburg
    • DESY Tour CFEL

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    • Session 7 CFEL

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      • 32
        Christian Ganninger - MicroTCA future developments
        The Specification for 40G for MTCA has completed all simulations and measurements to define the transfer channels. It has been verified that all available backplane connectors and plugs can be used for 40G transfer with appropriate backplane and board design covering the current requirements of particle accelerator projects. However, voices become louder asking for PCIe Gen 4 and 100G Ethernet. Additionally, the 80W power limitation per slot has been a challenge for several years. Consequently, a revised MTCA specification, breaking these limits needs to be implemented. First simulations and measurements already proof a downward compatible solution is possible allowing current and future AMC's in a Next Generation MTCA Crate. There are also ideas how the power per slot can be significantly improved without changing the whole MTCA concept.
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      • 33
        Jaroslaw Szewinski - Multipurpose MTCA.4 data processing board based on FPGA device with builtin data converters
        Xilinx, world leading FPGA vendor, has released RFSoC FPGA device family, which may have 8x RF-class 12-bit 4 GSPS ADCs and 8x 14-bit 6.5 GSPS DACs, together with the multi-core ARM processors and FPGA programmable logic available in one integrated circuit. Due to the high sampling frequency which is multiplied by number of channels, amount of data that has to be transferred to and from this device may be large. RFSoC technology fits very well to the MTCA.4 standard, due to high bandwidth backplane, which may carry data to and from data converters, as well as flexible Zone 3 interface which is suitable for analog I/O. This contribution will present the MTCA.4 RFSoC based device, equipped in 8xADC and 8xDAC variant of the FPGA device. The general board concept will be presented, as well as implementation details and possible project variants.
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      • 34
        Huizhou Ma - The DBPM Development of IHEP
        The Digital BPM system is developed according to the BEPCII requirement, compatible with "colliding" and " synchronizing" operation modes, the main text contents are including the basic BPM principle description in compatible mode, the adjustable clock logic design, the algorithm logic design, the compatible operating method, and so on. Finally, the clock logic and the algorithm logic of the BPM is tested in the laboratory, the results show that the performance of the digital BPM system can meet the BEPCIIs requirements well. In future, the DBPM will be developed in MicroTCA platform.
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      • 35
        Christian Amstutz - Practical experiences with a generic FPGA framework
        A generic FPGA framework has been developed with the goal to provide a generic platform for FPGA-based AMCs. The framework provides functionalities common among different FPGA projects, such as PCIe communication, memory access, data acquisition and configuration of on-board peripherals. This talk covers the experiences with the adaption of the framework to two different AMCs and the support for RTMs. The implementation of multiple FPGA applications within the framework is also shown. Furthermore, the support software developed along with the framework is presented. This software allows the user of the framework the handling of the register map, provides access to the registers and memory in Python, and implements some automatic test procedures.
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      • 36
        Ludwig Petrosyan - MTCA Multiprocessor system using PCI Express Non Transparent Bridging
        Distributed systems are gaining popularity as they fill the need of next generation systems. Multiprocessor systems provide not only the ability to increase processing bandwidth, but also allow greater system reliability through host failover. The use of non-transparent bridges in PCI systems to support intelligent adapters in enterprise systems and multiple processors in embedded systems is well established. In these systems, the non-transparent bridge functions as gateway between the local subsystem and the backplane. Such applications can be ported to PCI Express by the use of non-transparentt bridges, with the non-transparent bridge integrated into a PCI Express switch in place of one of the transparent bridges. Switch with a single [port configured to operate in non-transparent mode supports intelligent adapter and dual-host models. Our experience of establishing non-transparent bridging in MTCA system will be presented.
        Slides
    • Coffee Break CFEL

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    • Session 8 CFEL

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      Building 99, Notkestraße 85, 22607 Hamburg
      • 37
        Fumihiko Tamura - MicroTCA.4 based LLRF control system of the J-PARC RCS: design and status
        The rapid cycling synchrotron (RCS) of the Japan Proton Accelerator Research Complex (J-PARC) aims at very high output beam power of 1MW. Precise rf voltage control is required for acceleration of high intensity proton beams. The existing digital low level rf (LLRF) control system has been working nicely, while the FPGAs on the system are obsolete. It will be difficult to maintain the system soon. Therefore, a complete renovation of the LLRF control system of the RCS is ongoing. We employ MTCA.4 platform for the new system. A MTCA.4 shelf with the DESY-type rf backplane is employed to fit seven AMC boards for controlling twelve rf cavities. The AMC equips the Zynq FPGA with embedded Linux and the EPICS IOC. Signal and data transfer between the AMC boards via the backplane is a key to realize the necessary LLRF functions. In this presentation, we present the system configuration, the signal and flow, and the preliminary test results.
        Slides
      • 38
        Dimitri Tischhauser - MTCA.4 based Cavity and Coupler Interlock at the European XFEL
        The safe operation of cavities and couplers in the European XFEL accelerator environment is secured by a new technical interlock (TIL) design, which is based on the XFEL crate standard (MTCA™.4). The new interlock is located inside the accelerator tunnel. Several remote test capabilities ensure the correct operation of sensors for light, temperature and free electrons. Due to the space costs and the very high number of channels, the electronic concept was moved from a conservative, mostly analog electronic approach, with real comparators and thresholds, to a concept, where the digitizing of the signals is done at a very early stage. Filters, thresholds and comparators are moved into the digital part. The usage of an FPGA and an additional watchdog increase the flexibility dramatically, with respect to be as reliable as possible. An overview of the system is shown.
        Slides
      • 39
        Bruno Fernandes - Overview, experience and first results of MTCA applications at European XFEL Experiments
        The European X-Ray Free Electron Laser facility (European XFEL) has had its first lasing on May of 2017. Ultra short coherent X-Ray flashes spaced by 220 ns and with a duration of less than 100 femtoseconds are being delivered to the photon beamlines, where different scientific experiments are performed. The MicroTCA platform is heavily used in different fields, such as timing distribution, data processing from large 2D detectors, fast digitization of pulse signals with algorithms for peak and energy detection as well as low latency communication protocol for VETO systems. In this presentation, we will give an overview of our experience with the MicroTCA platform in this first year of operation, presenting first results, both raw and processed in hardware, implementation details that take advantage of the MicroTCA standard as well as future developments and other platforms and boards currently being considered.
        Slides
      • 40
        Friedrich Fix - MTCA image processing system based on Gig E Vision Boards and Protocols
        This presentation will describe GigEVision AMC and FMC development for serving area scan and line cameras on MTCA standard with scalable capacity. Based on a FPGA/FMC combination it is possible to serve a number of 40 Cameras in a MTCA.4 2U System. The Management will be realized via CPU The presentation will show possible application stories, further roadmap and steps for available Software tools. Also the scalability and “ADD on” configurations in MTCA systems is covered.
        Slides
      • 41
        Kai Rohm - How to solve common challenges with fast ADCs and use their full potential.
        Measuring fast events demands high data acquisition rates and precise timing. The topologies of most fast ADCs in the market are optimized for RF data transmission. However, some of those ADCs can also be optimized for time critical measurements. Strategies for choosing suitable converters and companion parts will be discussed.
        Slides
      • 42
        Martin Killenberg - Improvements in ChimeraTK
        We report on the latest developments in ChimeraTK (Control system and Hardware Interface with Mapped and Extensible Register-based device Abstraction Tool Kit). The DeviceAccess library, the ApplicationCore library and the ControlSystemAdapter have seen their first major release version 01.00, making them even more powerful and convenient to use. More and more device servers are being developed in ChimeraTK or ported to the framework, and are being used with EPICS, OPC-UA and DOOCS at several facilities.
        Slides