PICMG activities, new and future standards

• Joe Pavlat

Room: FLASH II Hall PICMG activities, new and future standards

Future High-Speed ADC and DAC Developments, Trends and Technology Advances

• Matthias Feulner (Texas Instruments Deutschland GmbH)

Room: FLASH II Hall High speed data converter technology has seen break-troughs in terms of performance and functionality in the past 10 years. Some key applications have been driving the development of leading edge data converter technology: o The wireless broadband broad-band revolution, starting with GSM as a voice-only service till the late 1990s, evolving to EDGE and Multi-carrier GSM, then followed by WCDMA and quickly by LTE thereafter with tremendous increases in requirements on dynamic range, bandwidth and as well foot-print with the introduction of MIMO antenna systems. Now 5G as the next future generation is already on the horizon and expected to present new challenges. o Wide-spread adoption of sophisticated medical imaging systems like ultra-sound, MRI or CT scanners. Massive beam-forming and desire for detecting smallest features to create accurate 2D and 3D representations of the human body's inside are key characteristics. o Introduction of high-density phased array approaches for example in radar systems drives the need for accurate synchronization of very complex, often distributed systems allowing to quickly scan large areas with static antennas instead of previously used rotating antennas. o Ultimately, the aim to create true Software Defined Radios (SDRs), capable of operating at virtually every frequency and with every wave form, is calling for a revolution in radio architectures and thus motivating the use direct sampling technology, eliminating frequency conversion stages and frequency specific components. Now that some of the underlying drivers have become clear, the quest for ever more data converter performance is on and we'll take a look at the challenges involved specifically for data converters: o Wider bandwidth and the need to detect ever smaller signals are pushing dynamic performance & sample rate of data converters. We will look at trends for those and what factors are limiting ultimate performance. o Innovative architectures can help boost performance and move closer to the ideal performance and we'll introduce some recent advances. Spot light on interfaces: The evolution from CMOS to LVDS to JESD204B has enabled step functions in interface throughput and density o Synchronization for complex large array systems presents a challenge. JESD204B was defined with that in mind and introduces that capability as a standard feature. o Enabling remote concepts: Usage of a serialized digital link allows to route sample over wider distances, back planes and even over fiber. o Latency becomes deterministic: Aligning the sampling instant of individual elements in distributed systems becomes easier, but how is overall system latency managed? Where will we go next?

Closing remarks

• Holger Schlarb (DESY)

Room: FLASH II Hall