Readout Electronics / ASICs in DTS

Name: Readout Electronics / ASICs in DTS
Start: 2015-02-23T13:00:00+01:00
End: 2015-02-24T12:00:00+01:00
Location: DESY Hamburg

23–24 Feb 2015

DESY Hamburg

Europe/Berlin timezone

Chip Design Activities and Capabilities at KIT

23 Feb 2015, 13:10

20m

Sem Room IV Bldg 99 (CFEL) (DESY Hamburg)

Bldg. 99 (CFEL)

Session 1: Current Design Activities

Mr Richard Leys ((KIT))

There are no materials yet.