-
17:00
Intro
-
Marcel Stanitzki
(DESY)
Richard Nickerson
(Oxford University)
Vitaliy Fadeyev
(SCIPP / UCSC)
-
17:05
Architectural chip design
-
Herve Grabas
(UCSC)
-
17:15
Testing HVStripV1
-
Craig Buttar
(University of Glasgow)
Dopke Jens
(RAL)
Jaya John John
(Oxford)
KESTUTIS KANISAUSKAS
Luigi Vigani
(Oxford)
Todd Huffman
(Oxford University)
-
17:30
Testing CHESS1
-
Igor Mandic
-
17:40
Testing CHESS1 Active circuitry
-
Herve Grabas
(UCSC)
-
17:50
Status of test kit and its distribution; CHESS daughter board
-
Huffman Todd
Jaya John John
(Oxford)
-
18:10
Discussion
