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17:00
Intro
-
Marcel Stanitzki
(DESY)
Richard Nickerson
(Oxford University)
Vitaliy Fadeyev
(SCIPP / UCSC)
-
17:05
CHESS-2 design
-
Angelo Dragone
(SLAC)
Herve Grabas
(UCSC)
Ryan Herbst
(SLAC)
-
17:20
HR-CMOS design update
-
Dipayan Das
(STFC)
Renato Turchetta
(STFC)
-
17:40
Testing HVStripV1
-
Craig Buttar
(University of Glasgow)
Dopke Jens
(RAL)
Jaya John John
(Oxford)
KESTUTIS KANISAUSKAS
Luigi Vigani
(Oxford)
Todd Huffman
(Oxford University)
-
18:00
Testing CHESS1
-
Igor Mandic
-
18:10
Testing CHESS1
-
Herve Grabas
(UCSC)
Zhijun Liang
(UCSC)
Zhijun Liang
(UCSC)
-
18:20
Status of test kit and its distribution; CHESS daughter board
-
Huffman Todd
Jaya John John
(Oxford)
-
18:30
Discussion
