Speaker
Mr
Jan Marjanovic
(DESY)
Description
The latency of the controller is an important parameter to consider in digital feedback systems, for example in LLRF controller for normal conducting RF structures. Contributing to the total latency of the controller are also the ADC internal pipeline and the interface between the ADC and the FPGA.
In this talk different ADCs with different interfaces are compared: a 125 MSPS ADC with an LVDS interface, a 500/800 MSPS ADC also with an LVDS interface, a 1 GSPS ADC with a JESD204B interface and an RFSoC. The measurement method evaluates the latency from the ADC input to the point where the data is available in the FPGA.
With the current and future developments on the MicroTCA platform users are presented with numerous options for digitizers. The results presented here put into perspective an important parameter of these devices.
Primary authors
Mr
Jan Marjanovic
(DESY)
Uros Mavric
(DESY)
