Speaker
Mr
John Molendijk
(CERN)
Description
The embedded baseband network analyzer in digital LLRF systems has been around for over 10 years as developed at SLAC for PEP-II. These systems allow creation of very efficient tools to configure and verify the loop settings in LLRF systems, even in closed loop. They operate by injecting a burst of baseband noise into the digital section of the regulation loop while acquiring the loop reactions at a selected point in the loop. The resulting transfer function is fitted to a model to extract descriptive parameters of the system. When precise measurements are required further away from the central RF carrier the precision of this basic method is limited by the available length of the excitation and acquisition buffers.
The extended baseband network analyzer architecture overcomes these problems by means of a digital up-modulation of the baseband noise and a subsequent digital down-modulation prior to the acquisition recording. The injected noise file contains as before only narrow band, low frequency noise, but it is now transposed to the desired frequency offset by a digital modulator. On the acquisition side a similar (de)modulator is used to transpose the measured signal back down to baseband prior to a low-pass filter stage and the data recorder. By performing successive measurements at different frequency offsets a wideband response can be evaluated through a succession of narrowband measurements with greater precision over the entire loop bandwidth.
Such an architecture has been implemented in the FPGA of the LHC 1-turn feedback and has demonstrated the possibility to precisely measure the narrow 58 Hz notches of the 1-turn feedback comb filter response more than 1 MHz away from the carrier, well beyond the LHC cavity controller 3dB bandwidth.
Primary author
Mr
John Molendijk
(CERN)
Co-author
Dr
Themis Mastoridis
(CERN)
