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Description
The characterisation of self-triggering front-end electronics is essential for understanding their timing behaviour, signal fidelity, and stability under high-rate conditions. We focus on the SMX ASIC developed for silicon microstrip detectors, integrating a shaping and discrimination chain with a 5-bit flash ADC and 14-bit signal arrival timing. The chip provides a dynamic range up to ~94 ke in standard gain (and ~625 ke in low-gain mode), intrinsic noise of ~350 e ENC (rising to ~1000 e for full module load), and a typical peaking time between 90-280 ns, making it suitable for high-rate tracking applications.
A waveform reconstruction based on the pulse-scan method is employed to analyse analogue response and triggering characteristics of double-sided double-metal (DSDM) Silicon Tracking System (STS) modules. These modules, developed for the CBM experiment at FAIR and adapted for the E16 experiment at J-PARC, provide a convenient testbed for studying shaping, sampling, and digitisation dynamics in realistic conditions.
Complementary S-curve analyses were refined by introducing skewness parameters and weighted averaging across multiple discriminator fits to capture asymmetries and correlations in discriminator response. The combined pulse-scan and S-curve approaches offer improved evaluation of the equivalent noise charge (ENC) and cross-validation of waveform-based results. Together, they provide a quantitative framework for optimising the performance of self-triggering detector systems.
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