Description
The rapid cycling synchrotron (RCS) of the Japan Proton Accelerator
Research Complex (J-PARC) aims at very high output beam power of 1MW.
Precise rf voltage control is required for acceleration of high
intensity proton beams. The existing digital low level rf (LLRF)
control system has been working nicely, while the FPGAs on the system
are obsolete. It will be difficult to maintain the system
soon. Therefore, a complete renovation of the LLRF control system of
the RCS is ongoing. We employ MTCA.4 platform for the new system. A
MTCA.4 shelf with the DESY-type rf backplane is employed to fit seven
AMC boards for controlling twelve rf cavities. The AMC equips the Zynq
FPGA with embedded Linux and the EPICS IOC. Signal and data transfer
between the AMC boards via the backplane is a key to realize the
necessary LLRF functions. In this presentation, we present the system
configuration, the signal and flow, and the preliminary test results.
Primary author
Dr
Fumihiko Tamura
(J-PARC Center, Japan Atomic Energy Agency)
Co-authors
Prof.
Masahito Yoshii
(KEK)
Dr
Yasuyuki Sugiyama
(KEK)
