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Description
Silicon Photomultipliers (SiPMs) offer high gain (typically 10^5 to 10^6) and a large dynamic range from single photons to up to several 10 000 photons at low bias voltages. They consist of single-photon avalanche diodes (SPADs) operated in Geiger mode. The small size of the SiPMs compared to conventional PMTs allows much higher integration levels of the front-end electronics. Therefore, SiPMs are used in a growing number of fields, including also medical applications. For high energy collider detectors, DESY has developed a highly granular calorimeter technology based on small scintillator tiles individually read out by SiPMs, which will be used in the upgrade of the calorimeter endcap of the CMS detector for the high luminosity LHC.
Most SiPMs are analogue devices, with all SPADs read out in parallel. In contrast to conventional analogue SiPMs, in digital SiPMs each pixel is readout individually by a small quenching circuitry so the resulting signal can be used in its digital form, and only an inverter is necessary for event discrimination. Digital SiPMs could offer a number of advantages, like the possibility to switch off noisy SPADs or a simplified data acquisition system.
This work describes a proof-of-principle 32-by-32-pixel digital SiPM prototype which is sensitive to high-energetic particles and light. It consists of an ASIC designed by DESY using LFoundry’s 150-nm CMOS process. The process offers fully characterized SPADs developed by FBK enabling the integration of sensor and readout electronics on the same ASIC. The ASIC has a size of 3.4 x 3.3 mm² and comprises 32-by-32 pixels, each pixel consists of 4 SPADs with 70-μm pitch. The chip enables full hit matrix readout and timing measurements. The pixel electronics offers options to turn off noisy pixels, reduce after-pulsing and count hits. A fast wired-OR triggers a global 12-bit time-to-digital converter (TDC), with one TDC per ASIC quadrant. The TDC has a time resolution of better than 100 ps. An additional validation logic with adjustable settings allows discarding undesirable events. The total sustained data throughput of the ASIC amounts to 4 Gbit/s at 3-MHz frame rate. A readout system based on Caribou, a versatile readout system developed by CERN, BNL, DESY and University of Geneva especially for fast and simple implementation of new detectors, has been implemented.
First measurements of the prototype have been performed in the lab as well as in test beam conditions. The global and in-pixel efficiency map as well as the dark-count rate as a function of the bias voltage and temperature will be presented. The technology is flexible, allowing adjustments of many parameters which can be tailored to the foreseen application.
