Speaker
Description
In the context of the back-end processing system for the CMS Phase-2 upgrade, the Serenity platform has been developed to serve as a common data processing blade with a single and dual FPGA configuration.
The Serenity family emerged from two prototype ATCA boards designed to explore alternative configurations. Serenity-A was designed around a single Virtex US+ FPGA. Serenity-Z contained two sites that utilized Samtec z-ray interposer technology to mount removable FPGA-based daughter cards. For the production systems, a joint platform utilizing the best from both prototypes has been developed. It supports a single FPGA configuration (Serenity-S) and a dual FPGA configuration (Serenity-D).
In this talk, we present the Serenity-S platform and explain the fragmentation between service area and payload. Furthermore, the methods used to achieve a clean board separation and efficiently implement the desired sub-systems are explained.