26–28 May 2025
Europe/Berlin timezone

Race Ya! An Accelerator-Native I/O Pipeline for HDF5

26 May 2025, 14:35
25m
FLASH seminar room

FLASH seminar room

FLASH Notkestrasse 85 22607 Hamburg
20-minute presentation + 5-minute Q&A

Speaker

Quincey Koziol (NVIDIA)

Description

GPUs and similar accelerators have become the dominant compute platform for STEM applications, from finance to space flight, and beyond. However, HDF5 continues to execute exclusively on the Host CPU of GPU nodes. This talk will present a design overview of moving the I/O pipeline filters, datatype conversions and other transforms from the CPU to the GPU, including how to perform I/O directly from GPU memory. Implementation details of the revised transform pipeline will be included, along with projected performance benefits.

May we record your session? Yes

Primary author

Presentation materials