Speaker
Petr Vetrov
(DESY, FEA)
Description
At DESY a cost effective, MTCA.4 based system for the control of accelerator magnets is being developed. Main components are a CPU card based on a ZYNQ SoC, up to 10 high-precision Analog -I/O modules with ADCs and DACs and a dedicated backplane. The CPU card supports the basic requirements of MTCA.4: a PCIe root complex, Ethernet, MLVDS, uRTM and IPMI interfaces, and can be used as CPU unit in a standard MTCA.4 crate. It communicates with the Analog-I/O modules via direct Point-to-Point connections with 5 differential lines. Prototypes of all System components are now under production. The presentation will give an overview about the system architecture and will provide details about the CPU- and I/O boards and the backplane.
Primary author
Petr Vetrov
(DESY, FEA)
Co-authors
Frantisek Krivan
(DESY, FEA)
Kay Rehlich
(DESY, MCS 4)
Klaus Diekmann
(DESY,FEA)
Manfred Zimmer
(DESY, FEA)
Ofir Shefer-Shalev
(DESY, MSC 2)
Thomas Delfs
(DESY, MSC 2)
