3–5 Dec 2019
DESY
Europe/Berlin timezone

Redundant CPU on MicroTCA System with PCI Express Non Transparent Bridge

5 Dec 2019, 15:45
15m
CFEL (DESY)

CFEL

DESY

Notkestraße 85 22607 Hamburg

Speaker

Mr Ludwig Petrosyan (DESY)

Description

One of the main characteristics of any control system is reliability and uninterrupted operation. Reaching that lofty target, however, requires more than having reliable hardware, hot-swap repair capabilities and robust software design. High availability need help from many redundant components, including redundant CPUs. The PCI Express standard is currently the most widely used architecture. The MTCA as well as the majority of architectures today use the PCI Express as a central bus of data transmissions. To protect against a failing CPU taking the entire system down, a backup CPU can be in place, ready to take over. One method is to have a secondary CPU behind an Non Transparent Bridge and use Non Transparent Bridge failover sequence. Our experience of the adjustment, starting and testing as well as use of the Redundant CPU on the MTCA system will be presented.

Primary author

Mr Ludwig Petrosyan (DESY)

Presentation materials