10Gb Ethernet and beyond on FPGA Workshop

Name: 10Gb Ethernet and beyond on FPGA Workshop
Start: 2012-05-24T13:00:00+02:00
End: 2012-05-25T12:30:00+02:00
Location: European XFEL / DESY

24–25 May 2012

European XFEL / DESY

Europe/Berlin timezone

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patrick.gessler@xfel.eu

UDP/IP Implementation and Data streaming

24 May 2012, 16:45

30m

Building 1 / Seminar Room 1 (European XFEL / DESY)

Building 1 / Seminar Room 1

European XFEL / DESY

Deutsches Elektronen-Synchrotron Notkestr. 85 22607 Hamburg Germany

Implementation, Measurements and Experience Session

Rob Halsall (STFC/RAL)

Slides

esdg-daq-udp-strm-25-05-2012.pptx

10Gb Ethernet and beyond on FPGA Workshop

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UDP/IP Implementation and Data streaming

Building 1 / Seminar Room 1

European XFEL / DESY

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10Gb Ethernet and beyond on FPGA Workshop

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