10–12 Dec 2013
DESY
Europe/Berlin timezone

MTCA.4 Front End Processing

11 Dec 2013, 12:30
8m
DESY Lecture Hall (DESY)

DESY Lecture Hall

DESY

Notkestraße 85 22607 Hamburg
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Speaker

Mr Thierry Wastiaux (Interface Concept)

Description

The best that the technology can provide in MTCA.4 Signal Processing

Summary

Last Digital Processing Technologies availlable:
- FPGAs by far the highest ratio processing power/consumption for parallel computing
- Virtex-7 example
- FPGAs high speed transceivers
- ADCs
- Vita 57 used for high speed coders
IC-FEP-TCAa Design in partnership with DESY :
- IC-FEP-TCAa/IC-ADC-FMCc presentation
- Reference Designs

Primary author

Mr Thierry Wastiaux (Interface Concept)

Presentation materials