4–7 Dec 2017
DESY
Europe/Berlin timezone

Mechanism to speed-up development of FPGAs in MicroTCA

6 Dec 2017, 16:30
15m
CFEL (DESY)

CFEL

DESY

Building 99, Notkestraße 85, 22607 Hamburg
Application in research facilities and industry Session 4

Speaker

Mr Vollrath Dirksen (N.A.T. GmbH)

Description

This presentation shows some solutions and ideas, how to speed up the development with FPGAs and FMCs (FPGA Mezzanine Card) in MicroTCA systems. Questions answered: How to debug multiple FPGAs in a MicroTCA.4 crate remotely at the same time by using only an Ethernet Cable? How to detect the FMC version and functions and how to load the right FPGA image at boot-up or hot-plug? How to program an FMC with an empty EEPROM (no management and module information)?

Summary

The easy to learn NAT-MCH user interfaces make the management and configuration of complex technologies e.g. PCIexpress-Clustering, complex system configuration, power management and collection of complete system information a task of seconds.

The same approach is followed for the FPGA and dynamically change FMC-IO.

Primary author

Mr Vollrath Dirksen (N.A.T. GmbH)

Presentation materials