13th MicroTCA Workshop for Industry and Research

10 Dec 2024, 08:55 → 12 Dec 2024, 23:30 Europe/Berlin

The 13th MicroTCA Workshop for Industry and Research will take place from 10-12 December 2024 at DESY.

The main topics of the workshop are:

• Applications in research facilities
• Applications in industry
• New Products
• New Technologies
• Future of standard and interoperability
• Software and firmware
• Industry Exhibition – presentation of modules and systems from industry and research

 

The registration fee  is

• Standard:  260 Euro
• Online participation: 140 Euro 
• Students/PHDs:  130 Euro

Tuesday 10 December

09:00 → 10:30 MTCA Tutorial: Basics

09:00 Introduction

Speaker: Kay Rehlich (not set)

09:05 MicroTCA Basics

Speaker: Ralf Waldt (Schroff GmbH)

09:35 MicroTCA Management

Speaker: Heiko Körte (N.A.T.)

10:05 Communication links, clocks and triggers

Speaker: Kay Rehlich (not set)

MicroTCA_CommunicationClocksTriggers2024.pptx

09:00 → 10:30 MTCA Tutorial: Hardware Design and Test Environment

09:00 Hardware Design and Test Environment

Speaker: Michael Fenner (MSK (Strahlkontrollen))

how-to-download.txt

MicroTCA Hardware Design and Test Environment.pdf

10:30 → 11:00 Coffee break

11:00 → 12:30 MTCA Tutorial: FWK+ChimeraTK

11:00 Unlocking MicroTCA.4 for FPGA Developers

Speaker: Cagil Guemues (MSK (Strahlkontrollen))

mtca_ws_tutorial_2024.pdf

11:45 Control Application Interfacing with ChimeraTK and Python

Our ChimeraTK software framework enables rapid development of servers interfacing control applications. It abstracts details of hardware access, turning them into a matter of configuration, and provides immediate integration with the FWK firmware framework. In the style of a tutorial, we show how to quickly configure an OPC UA server that talks to the firmware application. We show how the framework supports readout triggering via user interrupts, and extensions of business logic in software. In particular, we show how to use our new PyApplicationCore bindings to create a server module in Python. In this way, our readily packaged Generic Server can be extended to include application logic by just adding configuration files and Python code. Finally, we demonstrate how ChimeraTK grants freedom of choice of control system integration, such as OPC UA, DOOCS, EPICS or Tango.

Speaker: Dietrich Rothe (MSK (Strahlkontrollen))

chimeratk-tutorial.pdf

12:30 → 14:00 Lunch

14:00 → 15:30 Session 1

Convener: Dr Holger Schlarb (DESY)

14:00 Introduction

Speaker: Dr Holger Schlarb (DESY)

2024-12-10_13th-MTCAWS_Intro_HS_final.pdf

2024-12-10_13th-MTCAWS_Intro_HS_final.pptx

14:15 Welcome

Speaker: Beate Heinemann (DESY and University of Hamburg (Germany))

20241210_microTCA_Beate_Heinemann.pptx

14:30 Status of upgrades to MicroTCA at the Spallation Neutron Source

The Spallation Neutron Source (SNS) has been in production for over 18 years and is beginning to upgrade systems as part of a reliability, availability and modernization strategy. One of the primary paths for modernization for accelerator control systems include MicroTCA. The first MicroTCA system at SNS was deployed in 2019 and has been in production since that time. Since then, numerous other systems have been upgraded as part of larger upgrade projects or routine maintenance. These upgrades include Machine Protection System (MPS), LLRF systems, Timing applications, and Magnet Power Supply controls. The rate of upgrades is not slowing down soon as several more are planned for Timing, HPRF, additional magnet power supply controls, and LEBT Chopper. This presentation will highlight our successful upgrades, future plans, and some valuable gems that we have gleamed during this process.

Speaker: Thomas Justice

Status_MTCA_SNS_2024.pptx

14:45 Current Status of MicroTCA at ESS

As ESS approaches the commissioning of the full Linac and Target over the next year, the deployment of the various MicroTCA systems is becoming more critical. This talk will give an update of our current status, recent activities and achievements, unwanted gremlins and future steps.

Speaker: Faye Chicken (European Spallation Source ERIC)

ESS_DESY_MTCAWS_2024.pdf

ESS_DESY_MTCAWS_2024.pptx

15:00 ITER Fast Instrumentation and Control: Current Status and Plans for MTCA

ITER is designed to be the world’s largest tokamak, aimed at demonstrating the feasibility of fusion as a large-scale, carbon-free energy source. The challenges in ITER's design and manufacturing arise not only from its scientific objectives but also from the collaborative effort of 40 countries and the project's long duration.
To address these challenges, the ITER Plant Control Design Handbook outlines the standards, specifications, and interfaces applicable to all ITER plant system instrumentation and control. In this framework, instrumentation and control systems are categorized by their input/output requirements into slow and fast systems. Slow systems are primarily implemented with PLCs, while fast systems utilize standards such as PXI/e, MTCA, and ATCA.
This talk will cover the current status of ITER fast controllers, with a particular focus on the role of MTCA within the project, as well as future plans for its use and standardization.

Speaker: Sergio Esquembri (ITER)

ITER MTCA.pptx

15:15 Discussion

15:30 → 16:00 Coffee break

16:00 → 18:00 Session 2

Convener: Heiko Körte (N.A.T.)

16:00 Keynote: 60 Years of Synchrotron Radiation

Speaker: Edgar Weckert (FS (Forschung mit Synchrotronstrahlung))

60_years_SR_at_DESY_EW_Dec_2024.pptx

16:30 MTCA-based Accelerator Control Systems at DESY

MTCA-based systems are widely used at many of DESY's accelerator facilities. A brief review of the current accelerator controls status and some experiences, with focus on the used MTCA technology will be shared. After the successful implementation of MTCA at the European XFEL and FLASH facilities, this hardware standard and platform has since made inroads into the various new projects and accelerator research and development programs at DESY. A short overview of these and related projects at DESY will be presented.

Speaker: Tim Wilksen (DESY)

MTCAWS_2024_Tim_Wilksen.pdf

16:45 Status of MTCA at J-PARC in 2024

The LLRF systems based on MTCA.4 in Japan Proton Accelerator Research Complex (J-PARC) are working stably and reliably. They support the stable beam delivery from RCS and MR to the experiments at very high beam power. Recently, we achieved the design output beam power of RCS and MR. There are new MTCA applications projects such as digitizer modules for beam loss monitor at J-PARC. The status and future plans of the MTCA applications at J-PARC are presented.

Speaker: Fumihiko Tamura (J-PARC Center, Japan Atomic Energy Agency)

MTCAWS_2024_tamura_J-PARC_status.pdf

17:00 MTCA.4-based high-speed digitizer system for J-PARC MR

Monitoring and analysis of the recorded beam signal is essential for the beam operation.
Oscilloscopes are currently used to record the waveform of the beam signal in the Main Ring (MR) of the Japan Proton Accelerator Research Complex (J-PARC).
Since the memory size and the data transfer speed are limited for the oscilloscope,
it is hard to record and transfer the waveform of the beam signal for the whole acceleration cycle for every pulse.
To meet the requirement, a high-speed MTCA digitizer system is introduced into the J-PARC MR.
MTCA digitizer system consists of Teledyne SP Devices ADQ14 digitizer AMC and Vadatech VT816 chassis.
The digitizer’s memory is large enough to store the beam signal for the whole acceleration cycle recorded with a sampling speed faster than 500MSa/s.
Data transfer via PCI-express in the MTCA backplane enables continuous data acquisition from the digitizer.
In this presentation, the current status and future of the application of the MTCA.4-based digitizers are presented.

Speaker: Yasuyuki Sugiyama (KEK)

MTCAWS2024_sugiyama.pdf

17:15 Modernizing Fermilab's Accelerator Control Hardware

Modernizing the Fermilab accelerator control system is essential to future operations of the laboratory's accelerator complex. The existing control system has evolved over four decades and uses hardware that is no longer available.The Accelerator Controls Operations Research Network (ACORN) Project will modernize the control system and replace end-of-life power supplies to enable future accelerator complex operations with megawatt particle beams. The ACORN project is planning to replace Fermilab’s obsolete CAMAC crate-and-card controls hardware with modern MicroTCA hardware. There are over 2,000 CAMAC cards and over 250 CAMAC crates serving various functions in Fermilab’s control system. We will review the existing CAMAC hardware and provide updates on the status of the ACORN project, which includes the conceptual design of the MicroTCA replacement hardware and software tools for supporting the installation of hundreds of MicroTCA crates.

Speaker: Andrew Whitbeck (Fermilab)

ACORN_MTCA_DESY_wrkshp_2024.pdf

17:30 Update on a MicroTCA-based control system for quantum computers

Atom Computing has chosen to develop a control system for its quantum computers based on the MicroTCA platform. We previously reported on the challenges and successes of developing and integrating such a system. After almost a year of operating our last-generation quantum computers, we can now share our experience with operating these systems.

The presentation begins with an introduction to the company and its quantum computers, followed by highlights from our recently published results. We continue with an explanation of the role of the control system in a quantum computer, diving deeper into the hardware itself. Here, the role and advantages of the MicroTCA platform are clearly visible - a modular platform that allows us to reuse building blocks to construct a system that is easily extendable to accommodate the ever-changing needs of the system. We then discuss our experience operating a control system for large quantum computers, touching on some of the challenges we faced and the solutions we implemented.

With the quantum computers in operation, most of the effort was spent developing more features in gateware and software. Nonetheless, we also completed two hardware projects that we are excited to present: the first is a DMD controller, where the MicroTCA part is fully built from COTS components, highlighting the ease of development on the MicroTCA platform. The second is a trigger extender board for DAMC-FMC2ZUP, released as an open hardware project, as it might be of interest to the broader community.

Finally, as we look toward the future and begin planning our next-generation machines, we discuss considerations for multi-chassis synchronization and a new Zone 3 class that might be required as we progress toward utility-scale quantum computers.

Speaker: Jan Marjanovic (Atom Computing, Inc.)

MicroTCA 2024 - Update on a MTCA system for QC - Marjanovic.pdf

17:45 Discussion

Wednesday 11 December

09:00 → 10:30 Session3

Convener: Axel Winter

09:00 Summary on the MicroTCA workshop in China

The 2024 MicroTCA Workshop in China was held on September 18~21st, at University of Science and Technology of China(USTC) ,Hefei City, China. The Workshop promotes and coordinates the development of MTCA standards and systems in China , especially in data acquisition, digital signal processing, measurements, instrumentations, Controls, and AnalogCircuit (Microwave/RF)applications in particle accelerators, high energy physics,photon/neutron sciences, plasma fusion, high power laser, and industries.

The summary on the MicroTCA workshop in China will be introduced, and also some summary and highlight of MicroTCA applications in China will be mentioned in this presentation.

Speaker: Zeran Zhou (USTS)

Summary on the MicroTCA workshop in China.pdf

09:15 MicroTCA use at HEPS

The high energy photon source (HEPS) is a 4th generation synchrotron light source under commissioning by the institute of high energy physics. For its timing and Linac LLRF systems, the MicroTCA technology is used. This report will introduce the most recent commissioning status and the use of MicroTCA technology on HEPS.

Speaker: fang liu (Institute of High Energy Physics)

09:30 Update of CERN Proton Synchroton (CPS) Beam Controller based on MicroTCA architecture

The CERN Proton Synchrotron (CPS) Low Level RF (LLRF) is one of the oldest still operating systems at CERN. Due to new needs in beam manipulation, inter-machine synchronization, diagnostics, maintenance and remote machine configuration, the old NIM and VME based, mainly analog, system is set to be replaced with modern digital electronics implemented on a MicroTCA platform. This upgrade also includes a redesigned, more centralized beam controller, paired with compact digital modules, resulting in a significant reduction in hardware requirements. Synchronization between RF stations will be upgraded to use the White Rabbit (WR) deterministic link. This presentation provides an overview of the proposed architecture, hardware, firmware, and development plan, focusing on the beam, radial and synchronization loops, as well as the interaction between this module and other components in the system.

Speaker: Francisco Javier Diaz Ferreira

mTCA_2024_CPS_FDF_animated.pdf

09:45 Keynote: Technology advances in AD and DA converters, an outlook

Speaker: Martin Walker (Analog Devices)

10:15 Discussion

10:30 → 11:00 Coffee break

11:00 → 12:30 Session 4

Convener: Tobias Hoffmann (Helmholtzzentrum für Schwerionenforschung GSI GmbH)

11:00 Introducing nVent SCHROFF's Cutting-Edge MTCA.4 Crate with Superior Bandwidth and Cooling

nVent SCHROFF has announced the launch of its next-generation MTCA.4 Crate, designed to support128 Gbits bandwidth per slot with PCIe Gen 5. The 9 U, 12 Slot Crate features enhanced cooling with improved rear card cage cooling and a new Cooling Unit Manager design. The new cooling units incorporate a new Cooling Unit Manager based on the STM32 controller from STMicroelectronics, replacing the previous, discontinued Renesas H8S controller. The upgraded power budgets for MCH and Cooling Units ensure optimal performance of the Hub at those higher data transfer speeds.

The MTCA.4 Crate is downward compatible, allowing for a mix and match of legacy and new chassis and cooling units. It supports PCIe Gen 4/5 and 100 GbE, in line with the recently released Revision 3.0 of the MTCA.0 standard. The new backplane design ensures the highest data bandwidth by using low loss backplane material and SMD MTCA connectors, making the MTCA.4 Crate a future-proof solution for high-performance applications.

Speaker: Christian Ganninger (nVent SCHROFF)

2024-12-02 - Next Generation MTCA.4 Crate.pptx

11:15 NAT-MCH Gen4

The 4th generation of NAT-MCH is the successor of the 3rd generation of NAT-MCH, which - after more than 18 years of successful deployments - is coming to its end of life now.

The 4th generation MCH provides a lot of improvements and new features and functions, such as 10GbE base switch with 25GbE uplinks, new 40/100GbE fat pipe hub with 10/40/100GbE uplinks, new PCIe Gen 4 fat hub, new CLK module with replacement for IDT multiplexer, new web and harmonized CLI interface in order to name a few.

Also, the 4th generation MCH is MTCA.0 Rev 3 compliant and has been designed to meet the upcoming requirements addressed by the next generation of MicroTCA as close as possible already.

To ensure product continuity, the family of NAT-MCHs of the 4th generation include ready-to-go products for science and research, similar to the NAT-MCH-PHYs and NAT-MCH-PHYS80.

After a short overview comparing the 3rd generation NAT-MCH with its 4th generation, N.A.T. will explain how existing customers can easily migrate to the 4th generation MCH in existing applications. Finally, the presentation will close providing dates for Last Time Buy (LTB) and Last Time Ship (LTS) for all flavors of the 3rd generation NAT-MCH.

Speaker: Heiko Körte (N.A.T.)

11:30 Update on MicroTCA.0 R.3 and other new products

Short introduction to EMCOMO and Vadatech, products conforming to the new standard MicroTCA.0 R.3 and other new products from Vadatech.

Speaker: Karl Judex (EMCOMO Solutions AG)

MTCAWS 2024 EMCOMO.pdf

11:45 Add high channel count Analog IO to MTCA.4

The DESY DAMC-FMC1Z7IO is a cost-optimised IO controller and processing board in AMC formfactor with a front panel site for FMC modules. The module features a ZYNQ-7000 SOC that makes the AMC a networked computer node with extensive application capability. Now manufactured under license by D-TACQ Solutions, DAMC-FMC1Z7IO also supports an MTCA.4 RTM with Z3 D1.0 signaling; This makes the AMC module compatible with ACQ400-MTCA-RTM2, a two-site module carrier allowing access to a wide range of simultaneous analog IO from D-TACQ Solutions. Here we offer some real-world examples.

Speaker: Mr Peter Milne (D-TACQ Solutions)

talk22-milne-d-tacq.pdf

12:00 X86 CPU boards for MicroTCA

The AMC market being smaller compared to the one for ATX boards, the limited power budget including the thermal envelope of an AMCs and finally the limited number of high-speed lanes to the backplane, contributed to the availability of embedded X86 CPU AMCs constantly staying behind new CPU generations launched by INTEL/AMD since the very beginning of MicroTCA in 2006.

As new concepts were required to overcome this situation, N.A.T. introduced a carrier for standard COMex modules in form of a rear transition module (RTM) for the NAT-MCH in 2012. With the development of the double-width NAT-AMC-COMex, this approach was successfully ported to AMC formfactor.

This presentation will provide guidance regarding today’s features and function of the latest CPU generations in comparison with the requirements of different MicroTCA applications and will also highlight how the development of new x86 CPU generations might impact the MTCA market in the future.

Using the example of the latest version of the NAT-AMC-COMex, the presentation will explain how standard MTCA systems can benefit from this approach and how the usage with the new NATIVE-server allows to design completely new and cost-effective applications.

Finally, the presentation will also address how N.A.T. plans to expand the concept to the single-width AMC formfactor to support applications with less demanding x86 CPU requirements.

Speaker: Herbert Erd (N-A.T GmbH)

12:15 Discussion

12:30 → 14:00 Lunch

14:00 → 15:30 Session 5

Convener: Christian Ganninger (SCHROFF)

14:00 The Path to Series Production of the MicroTCA.4 Based Scientific Detector Controller (NGCII) for the Extremely Large Telescope

After performance validation of the detector controller configuration for CMOS scientific detectors, indicating that noise performance and readout speed requirements will be met, preparations for series production and delivery of the majority of systems for the ELT first-generation instruments are made. This also includes the development of tools and processes for operation of the controller in the field and finalization of electrical, mechanical, software and communication interface definitions with the telescope itself and the instruments that will integrate NGCII. In parallel development work for CCD system and mid-infrared fully digital CMOS detectors is ongoing.

Speaker: Mathias Richerzhagen (European Southern Observatory (ESO))

The Path to Series Production of the MicroTCA.4 Based Scientific Detector Controller (NGCII) for the Extremely Large Telescope.pptx

14:15 MTCA starterkits next step evolution

In this presentation, you will learn more about the upcoming statrterkits. The starterkits from powerBridge do include MTCA.0, Rev. 3 changes as well as new exciting products, including payload cards from Ioxos.

Speaker: Thomas Holzapfel (Industry Partner)

2024-12-03 DESY Workshop pBc IOxOS.pdf

2024-12-03 DESY Workshop pBc IOxOS.pptx

14:30 microTCA for the CMS Experiment at the Large Hadron Collider

One of the large general purpose particle physics experiments at the Large Hadron Collider, the CMS Experiment has been largely relying on microTCA electronics for over a decade. CMS is using a mixture of commercial infrastructure components, standardized CERN-wide, with custom AMCs for processing. This talk will give a brief overview over the CMS Experiment and the use of microTCA systems associated with it and will summarize the operational experience, problems encountered, and future plans.

Speaker: Kristian Harder (STFC UKRI)

kristian_harder_20241211.pdf

14:45 FWK - Open Source FPGA Framework from DESY

In recent years, DESY has diligently developed an open-source FPGA framework, known as FWK, aimed at expediting FPGA development within the scientific community, particularly with MicroTCA hardware. The framework serves as an abstraction layer that simplifies the utilization of various FPGA vendor tools, facilitates IP integration, aids in documentation creation, and offers many other benefits. In addition to FWK, DESY also provides a wealth of Board Support Packages designed for a range of MicroTCA AMC boards. This presentation will provide an overview of the FWK framework and showcase examples of open-source board support packages, demonstrating their practical utility in accelerating FPGA development for MicroTCA hardware.

Speaker: Cagil Guemues (MSK (Strahlkontrollen))

fwk_talk.pdf

15:00 Improving Signal Integrity of the Yamaichi AMC and Zone 3 Connectors

In order to address the bandwidth requirements for state-of-the-art protocols, signal integrity investigations and improvements have been carried out.

AMC Connector:
To address the potential discontinuation of the widely used Harting/ITB/Rompa AMC connector, alternative options have been investigated. One option is the Yamaichi CN084 connector. A test board was built to characterize its performance. Since the connector no longer uses through-hole pins, a significant improvement in signal integrity was anticipated. However, measurements revealed that the eye diagrams were equivalent to, but not superior to those of the existing connector.
An analysis of the recommended footprint for the connector identified several areas for improvement. Based on this analysis, an improved test board was designed, which demonstrated a significant enhancement in signal integrity.

Zone 3 Connector:
The ERNI/TE ERmetZD Zone 3 connector is rated for "5 Gbps or higher" per lane, which limits its compatibility with modern protocols that often require higher link speeds, such as 8 Gbps, 10 Gbps, or 12.5 Gbps. Ensuring reliable link performance was a key challenge in the design of the DRTM-8SFP+ board. The goal was to implement an 8-channel SFP+ fan-out RTM with 10 Gbps links. This task was demanding, since signals needed routing over very long traces to the FPGA, especially on the AMC.
To overcome this limitation, we used an analog equalizer chip, fine-tuned its parameters, optimized the PCB layout and carefully adjusted the FPGA transceiver settings. These efforts resulted in clean, wide-open eye diagrams at the target speeds.

The AMC connector layout improvements, their impact on performance and the Zone 3 equalizer approach will be presented in this talk.

Speaker: Michael Fenner (MSK (Strahlkontrollen))

Improving Signal Integrity of the Yamaichi AMC and Zone 3 Connectors.pdf

Improving Signal Integrity of the Yamaichi AMC and Zone 3 Connectors.pptx

15:15 Discussion

15:30 → 16:00 Coffee break

16:00 → 17:45 Session 6

Convener: Thomas Holzapfel (Industry Partner)

16:00 Status of the new MTCA.4 motion controller and it's application in photon science

I will present the status of the new MTCA.4 based motion controller that is being developed at DESY and present it's first application in a user beamtime at beamline P24 at PETRA III. Furthermore I will show other potential applications of MTCA.4 in photon science, which will be relevant for the PETRA IV upgrade.

Speaker: Martin Tolkiehn (FS-PETRA-D (FS-PET-D Fachgruppe P24 (Chem.Cryst.)))

16:15 Status Update on the Open-Source Synchronous Multi-Axis Motion Controller Solution for Large-Scale Experimental Physics Projects

Synchronous multi-axis motion control systems integrated with diagnostic and data acquisition subsystems are critical components in large experimental physics projects. To meet these specific requirements, DESY has developed an open-source motion control solution based on the DAMC-MOTCTRL board. Designed for projects like PETRA IV, this system enables synchronized control of up to 48 stepper motors on a single AMC board, interfacing with established control systems such as DOOCS, EPICS, and TANGO, or through a direct ASCII interface.

After presenting the alpha firmware version of this controller last year, significant milestones have been achieved. In March, a firmware update addressed a long-standing limitation of commercial off-the-shelf motion controllers by enabling precise trigger signal generation for data acquisition, a critical feature for experimental timing. Shortly afterwards, the motion controller was confidently deployed in a multi-day live experiment at PETRA III, where it operated reliably and performed as expected. The latest firmware release now fully supports synchronous control of up to 16 motors through the first of three optical connectors, paving the way to scale up to 48 motors in the near future. Alongside this, development is underway to implement an industry-standard interface to synchronize the motion controller with other experimental devices.

This presentation will provide an overview of the hardware and firmware architecture, introduce the latest features, and outline the roadmap for the PETRA IV motion controller.

Speaker: Michael Randall (MSK (Strahlkontrollen))

Motion Controller in MicroTCA.pdf

16:30 The use of DAMC-UNIZUP board for the MTCA.4 BPM system for PETRA IV

In the last three years, Instrumentation Technologies (I-Tech) and DESY have developed a MTCA.4 BPM electronics prototype for the PETRA IV TDR phase. The prototype consists of the BPM-optimized signal conditioning and digitizing RTM module from I-Tech, and the cost optimized DAMC-UNIZUP AMC processing board from DESY MSK. The prototype was delivered at the end of 2022 and confirmed with beam tests in PETRA III.
In the last year, the BPM application, including the FPGA gateware as well as the software, has grown into a mature solution, becoming hardware agnostic, both in terms of the AMC board used (DAMC-FMC2ZUP or DAMC-UNIZUP) as well as the platform used (MTCA.4 or Libera Brilliance+). The techniques and challenges required to reach this level of maturity, both in terms of hardware and software, are described.
In 2024, I-Tech licensed the DAMC-UNIZUP board from DESY-MSK: the board is planned to be used also for the PETRA-IV Fast-Orbit Feedback architecture, and can be considered for other applications requiring the RTM+AMC topology.

Speaker: Aleš Bardorfer (Instrumentation Technologies)

MTCA_Workshop_24_Ales_Bardorfer.pdf

16:45 Status Update on MicroTCA based Fast Orbit Feedback System for PETRA IV

PETRA IV is the upcoming fourth generation 6 GeV low-emittance light source at DESY Hamburg. The Fast Orbit Feedback (FOFB) system for PETRA IV will be a large multi-input multi-output (MIMO) control system in an extended star topology. The layout is optimized to reduce the latency between the 790 beam position monitors (BPM) and the 560 fast corrector magnets. The FOFB system is mainly based on MicroTCA technology. The high-speed data transmission and distributed signal processing for the centralized control scheme are implemented on over 500 Advanced Mezzanine Cards (AMC) in about 100 MicroTCA crates. In this contribution, we present the orbit feedback topology, the requirements for the MicroTCA components, the modeling of the individual subsystems and their interaction in the overall feedback scheme.

Speaker: Sven Pfeiffer (DESY)

SPfeiffer_Status_FOFB_PIV_178896.pdf

17:00 Development of a new AMC card for the Diamond-II EBPM Upgrade

For the Diamond-II upgrade the entire Electron Beam Position Monitor system will be upgraded with 10-times the bandwidth. This will be implemented on AMC cards with 250 Ms/s ADCs and substantial signal processing. Finding a suitable AMC card was unexpectedly challenging and we have worked closely with IOxOS on the development of the new IFC_1412 AMC carrier card. This presentation will cover the design of the new D-II EBPM system, the choice of hardware, and the process of working with the vendor on the development of the new carrier card.

Speaker: Michael Abbott (Diamond Light Source Ltd)

michael.pdf

17:15 µTCA based 1kHz camera readout for beam stabilization for KALDERA at DESY

KALDERA is a new laser plasma accelerator (LPA) built at DESY whose key element is a kHz repetition rate. This repetition rate will enable feedback control to achieve a higher level of stability and reliability than existing LPAs operating at a repetition rate of a few hertz. But the higher repetition rate also puts new requirements for the online diagnostics, which is the prerequisite for the beam stabilization.

In our presentation, we will show the system used for the camera readout and image processing at 1 kHz repetition rate based on the DAMC-FMC2ZUP board. We will give insights into the architecture of the software and firmware used and outline the path towards closing the feedback loop.

Speaker: Mr Carsten Dülsen (MLS (Laser fuer Plasmabeschleunigung))

uTCA-WS_2024_kHz-readout-kaldera.pdf

17:30 Discussion

19:00 → 22:00 Dinner

Thursday 12 December

09:00 → 10:30 Session 7

Convener: Timo Korhonen (European Spallation Source ERIC)

09:00 MTCA applications at HZDR

The superconducting electron accelerator ELBE at HZDR is migrating machines systems to the MTCA platform for many years now. Partially to replace obsolete hardware, partially to integrate new beam diagnostics and features to the accelerator. The contribution will show the implementation of LLRF systems, bunch arrival time monitors, longitudinal beam-based feedback and timing system. It will give insights into the hardware used, firmware and server applications.

Speaker: Michael Kuntzsch (HZDR)

Kuntzsch_MTCA Workshop 2024.pdf

09:15 Image Acquisition and Processing with MicroTCA.4

Development of high-performance digital cameras in recent years has made them promising tools for observing and analyzing transient and fast events in large-scale scientific experiments, such as ITER, JET, Wendelstein 7-X or WEST. The modern digital cameras allow acquiring images with a megapixel resolution and thousands frames per second. A digital camera working with a high resolution and a high frame rate produces a large stream of data reaching dozens of gigabytes per second.

A flexible and scalable hardware platform is required for image acquisition and image processing in real-time. The MicroTCA.4 standard, originally developed for the High Energy Physics community, provides all required interfaces to design a powerful and scalable image acquisition system.

A dedicated MicroTCA.4-compatible hardware components, firmware and software for real-time image acquisition, archiving and processing were developed at Lodz University of Technology. Developed solutions for various camera interfaces will be presented and discussed on the example of machine protection system developed for the Wendelstein 7-X stellarator.

Speaker: Dariusz Makowski (Lodz University of Technology)

_D.Makowski - Image Acquisition and Processing with MicroTCA.4_2024.12.09_short.pdf

09:30 The DAMC-DS5014DR: A High-Speed and High-Performance RFSoC-Based Platform for Diverse Scientific Applications

Integrating high-speed ADCs, DACs, and an advanced field-programmable gate array (FPGA) onto a single chip, utilizing Radio Frequency System-on-Chip (RFSoC) technology, creates a powerful and flexible platform for complex high-frequency instrumentation and real-time signal processing. This work will introduce the RFSoC-based MicroTCA.4 high-speed digitizer, the DAMC-DS5014DR, that offers significant flexibility, performance, and system integration advantages. The DS5014DR, equipped with eight channels of 5 GSPS ADCs and eight channels of 9.89 GSPS DACs, supports applications such as high-energy particle physics (HEP), superconducting detectors, astronomy, quantum computing, particle accelerators, beamforming, satellite payloads, and high-speed data converter analysis. This work will discuss the DS5014DR's hardware and firmware capabilities and review various applications, demonstrating the adaptability and potential of RFSoC technology to advance research and development across multiple domains.

Speaker: Behzad Boghrati (MSK (Strahlkontrollen))

12-12-2024- DAMC-DS5014DR- MicroTCA Workshop - V2.pdf

09:45 Update of controls for the MINERVA project

For the MINERVA project of SCK CEN, the fast control elements will be integrated using mTCA products. In this talk a brief update of the project is given. How we are organized for control system development, which tools we use and where mTCA products will be used.

Speaker: Kris Meeus (SCK CEN)

ICS_MINERVA_DESY_mTCA_WS_2024-12-10.pptx

10:00 LISA phasemeter project update

Speaker: Prof. Oliver Gerberding (Universität Hamburg, Institut fur Experimentalphysik)

20241212_LISA_GSE-PMS_MicroTCA.pptx

10:15 Discussion

10:30 → 11:00 Coffee break

11:00 → 12:30 Session 8

Convener: Dariusz Makowski (Lodz University of Technology)

11:00 Main Oscillator with sub-fs Resolution and High Performance Local Oscillator Generation in MicroTCA.4

KVG Quartz Crystal Technology GmbH is a professional frequency control products manufacturer, focusing on research, development, production and sales. High-end crystal oscillators are our specialty. We cooperate with DESY for the production and test of the Master Oscillator (MO) module and the Local Oscillator Generation (DeRTM-LOG) module. The MO can provide different fixed frequencies with excellent short-term noise below 1fs and long-term stability and high-power output. Besides, diagnostic units for various functions are available. The DeRTM-LOG is a MicroTCA.4 compliant and a multi-channel low noise local oscillator generator and high frequency signal and clock distribution module. Currently the DeRTM-LOG 1.3GHz and 1.5GHz are available.

Speaker: Jiaoni Bai (KVG Quartz Crystal Technology GmbH)

KVG - uTCA2024 DESY- Presentation.pptx

11:15 Remote setup of LLRF control systems through the example of TARLA

Remote maintainability is one of the core features of MicroTCA. In this talk I will present that this is not limited to already running systems, but also true for the setup of almost bare hardware. The remote setup of the TARLA LLRF system will serve as an example.

Speaker: Patrick Nonn (MSK (Strahlkontrollen))

2024-12-12_MTCA-WS_Remote-setup.pdf

11:30 Jump-Start Control Application Development with ChimeraTK and Python

Our ChimeraTK software framework enables rapid development of servers interfacing or extending control applications. It abstracts details of hardware access, turning them into a matter of configuration, and provides immediate integration with the FWK firmware framework. Modular libraries for hardware access by commonly used communication busses are included in ChimeraTK DeviceAccess, which features bindings to Matlab, Python, and the command line, as well a graphical user interface.
ChimeraTK ApplicationCore allows for a multi-threaded modular design of complex servers, using code that is fully independent of used control system and hardware access. There is a readily packaged Generic Server, which can be extended by server modules written in Python.
ChimeraTK Control System Adaptors grants freedom of choice of control system integration, such as OPC UA, DOOCS, EPICS or Tango.

Speaker: Dietrich Rothe (MSK (Strahlkontrollen))

chimeratk-talk24.pdf

11:45 Update: MicroTCA Next Generation specification

With the new release version 3 of the MTCA.0 specification marked a significant step forward last year increasing communication speed by a factor of four. The task of the MicroTCA Next Generation working group is now to provide more communication lanes further boosting speed to, for example, central processing units. This requires more power within the system. The presentation provides an update on the specification work.

Speaker: Kay Rehlich (not set)

2024-12-12_TalkMicroTCA_NextGeneration.pptx

12:00 Discussion

MTCA_Workshop_discussion_EPICSMeeting.pptx

Recommendations for MMC Implementations.pptx

12:30 → 12:45 Closeout

2024-12-12-13th-MTCAWS_CloseOut.pdf

13:00 → 14:00 Lunch