11th MicroTCA Workshop for Industry and Research

6 Dec 2022, 00:00 → 8 Dec 2022, 19:00 Europe/Berlin

The 11th MicroTCA Workshop for Industry and Research will take place from 6-8 December 2022 at DESY.

The main topics of the workshop are:

• Applications in research facilities
• Applications in industry
• New Products
• New Technologies
• Future of standard and interoperability
• Software and firmware

If you have any questions please send an email to the MTCA Workshop support team

The registration fees per person including coffee and lunch breaks, DESY tour, workshop dinner and workshop materials are 

• Standard 200 Euro 
• Online participation 120 Euro 
• Students/PHDs 110 Euro 

 

Tuesday 6 December

09:00 → 12:30 Registration

10:00 → 12:30 Tutorials

10:00 MicroTCA Basics

Speaker: Ralf Waldt (Schroff GmbH)

Tutorial MTCA_2022.pdf

Tutorial MTCA_2022.pptx

10:30 Communication Links, Clocks & Triggers, PCIe & Ethernet

Speaker: Kay Rehlich (not set)

MicroTCA_CommunicationClocksTriggers2022.pdf

11:00 Coffee Break

11:30 MicroTCA Management

Speaker: Heiko Körte (N.A.T.)

Tutorial_MicroTCA_Management.pptx

12:00 Application Concepts and Troubleshooting in MicroTCA

Speaker: Sven Stubbe (ITT (Business Development Office))

2022-12-06_MTCA_Apps_and_Troubleshooting.pdf

10:30 → 12:30 Tutorial: ChimeraTK

10:30 ChimeraTK: Teil 1

Speaker: Martin Killenberg (MSK (Strahlkontrollen))

ChimeraTK-DeviceAccess-tutorial2022_12.pdf

11:30 Coffee Break

11:50 ChimeraTK: Teil 2

12:30 → 14:00 Lunch

14:00 → 14:20 Welcome to DESY

Speaker: Edgar Weckert (FS (Forschung mit Synchrotronstrahlung))

1670328653281_2021-12-07_Intro_MicroTCA-Workshop_EW_final.pptx

14:20 → 14:30 Introduction

Speaker: Holger Schlarb (MSK (Strahlkontrollen))

2022-12-08 11th-MTCAWS_close_out.pdf

14:30 → 15:30 Session 1

Convener: Holger Schlarb (MSK (Strahlkontrollen))

14:30 Status of the FAIR Beam Instrumentation MTCA Applications

As the end of construction of the FAIR accelerator buildings is in sight the MicroTCA-based FAIR beam instrumentation data acquisition (DAQ) systems are ready for installation. Using COTS components or leveraging open hardware with in-house expertise in FPGA programming DAQ solutions for almost all major detector systems now exist in MicroTCA and are already in operation at the existing accelerators. Applications span a wide range often making use of the high channel density and data transfer bandwidth. Beam position and tune measurements over many seconds use an open hardware 250MSa/s FMC ADC with position calculation and data reduction done in the FPGA on the microTCA carrier. Current, pulse shape, and phase measurements with a fast current transformer are performed using a COTS 2.5GSa/s, multi-event FMC ADC/Carrier combination together with an in-house assembled rate divider based on open hardware. These and other applications like continuous scaler readout of 128 channels with 10MHz latching frequency or using MicroTCA as a compact performant readout for GigE cameras will be presented in this overview talk.

Speaker: Tobias Hoffmann (Helmholtzzentrum für Schwerionenforschung GSI GmbH)

Hoffmann_Status_FAIR Beam Instrumentation_MTCA_final (1).pdf

Hoffmann_Status_FAIR Beam Instrumentation_MTCA_final (1).pptx

14:45 Status update and first commissioning results from ESS

A lot of progress has been made in the ESS project since the last update in this workshop series. First substantial commissioning steps have been taken in the accelerator, including the most central MicroTCA-based systems. The talk gives a short overview of where the project stands at the moment, what are the experiences so far and what is to be expected in the next couple of years.

Speaker: Timo Korhonen (ESS)

MTCA4-at-ESS-MTCAWorkshop2022.pptx

15:00 Status Report on MicroTCA.4 based New Modular Controller for Astronomical Detectors (NGCII)

This presentation gives an update on the new modular astronomical detector controller (NGCII) developed at ESO. The controller will be used for all future instruments on the Extremely Large Telescope (ELT).

Final preparations for technical first light of a CMOS detector are ongoing and system level integration tests that go beyond the scope of single modules are performed. Important contracts for commercial components of the system have been closed and first considerations about series production of modules are made.

At the same time in-house prototype development of MicroTCA modules for detector types other than CMOS, like CCDs and fully digital detectors, has started.

Speaker: Mathias Richerzhagen (ESO)

Status Report on MTCA.4 based New Modular Controller for Astronomical Detectors (11th MTCAWS) (1).pdf

Status Report on MTCA.4 based New Modular Controller for Astronomical Detectors (11th MTCAWS) (1).pptx

15:15 MYRRHA - MINERVA accelerator project status and MicroTCA.4 developments.

The Belgian Nuclear Research Centre (SCK•CEN) is developing an innovative multifunctional research installation at its premises in Mol, Belgium. MYRRHA will be the world's first multifunctional research reactor powered by a particle accelerator. MYRRHA is a technological first with solutions to major societal questions. From less long-lived radioactive waste and new cancer treatments to new reactor concepts and further fundamental research.
This presentation will first introduce the MYRRHA reactor and the MINERVA project, the first phase in the construction of the MYRRHA reactor. In a second part, the current status of the project with focus on MicroTCA will be given. MicroTCA.4 has been chosen as the platform that will be used in the low level control of the accelerator and as an optional platform for other systems like beam diagnostics and instrumentation. The presentation will discuss current developments and future plans for using MicroTCA.4 in the MINERVA project.

Speaker: Wouter De Cock (SCK-CEN)

MTCA workshop 2022 - MINERVA.pptx

15:30 → 16:00 Coffee Break

16:00 → 17:30 Session 2

Convener: Heiko Körte (N.A.T.)

16:00 Keynote: Neutral Atom Quantum Computing with a MicroTCA Architecture

The race is on across the globe to build a useful quantum computer. Many modalities are being investigated to build a Quantum Computer including, but not limited to, Superconducting Josephson Junctions, Trapped Ions, Spin Qubits in Semiconductor Devices, and Trapped Neutral Atoms.
In this talk I will give a brief overview of Neutral Atom technology including the newly demonstrated pure, nuclear spin qubit found in a variety of Alkaline-earth (-like) atoms and go over recent results from both Atom Computing as well as Academia. Furthermore, I will touch on the complicated control environment for creating these quantum processors and how the unified MicroTCA architecture is allowing us to build highly synchronized, and dynamic control systems.

Speaker: Benjamin Bloom (Atom Computing, Inc.)

MicroTCA_2022_12_06_ext.pdf

16:30 Modular and Scalable Control System for Atomic Array Quantum Computers

Atom Computing has selected the MicroTCA platform to implement the control system for its quantum computers.
We start with a brief introduction of atomic arrays as a hardware platform for quantum computation and highlight the driving requirements for the control system. We also discuss how the control system fits into the technology stack of a quantum computer.
We then introduce the hardware components of the control system. In order to speed up the development, we employed a large number of COTS components. However, for performance-critical applications, we developed custom elements, most notably a RFSoC-based AMC, which is the fundamental building block that generates RF pulses and controls the suite of lasers necessary to cool and trap the atoms and encode them into qubits. In addition, we designed and built an RTM board that distributes digital triggers, as well as precision ADC and DAC FMC boards that servo a collection of electro-optical elements that manipulate the laser light.
The talk continues with an overview of the gateware, firmware, and software of Atom Computing’s control system and highlights how MicroTCA features facilitate the integration of hardware with the rest of the system. We conclude by sharing our experiences operating MicroTCA systems to control quantum computers.

Speaker: Jan Marjanovic (Atom Computing, Inc.)

MTCAWS2022 - Marjanovic - Modular and Scalable Control System for Atomic Array Quantum Computers.pdf

16:45 PICMG activities status report

PICMG is a nonprofit consortium of companies and organizations that collaboratively develop open standards for high-performance embedded computing applications, including MicroTCA. This presentation will survey the 28 years of open specifications and introduce two new initiatives (ModBlox7 & Far-Edge).
We will discuss the current specifications, our development processes, and the value of PICMG membership. PICMG members benefit by participating in standards development, gaining early access to critical technology, and developing relationships with thought leaders and suppliers in the industry.

Speaker: Jessica Isquith (PICMG)

2022 JAI MicroTCA Workshop.pptx

17:00 Developing the Next Generation of MicroTCA

The current MicroTCA specification has a data transfer speed limit of 8 GT/s for PCIe that is required for PCIe gen 3. Recent CPUs already implement PCIe gen 5 with a factor four communication speed increase. To update the PICMG standard accordingly a working was formed to tackle the challenges. Connectors, backplanes, routing and power issues for example had to be solved. The presentation will discuss the status and future steps to keep MicroTCA viable over many more years.

Speaker: Kay Rehlich (DESY)

2022-12-06_TalkMicroTCA_NextGeneration.pdf

17:15 AMD new ACAP Architecture enables close to Zero Dark Silicon

AMD / Xilinx achieved the world's highest compute efficiency at 90%, becoming the first vendor to achieve near Zero Dark AI Silicon in modern AI benchmarks.

Planning for AI requires an understanding of how much data needs to be processed and how quickly that needs to happen. This talk will talk about data bubbles and domain-specific designs, why dark silicon is no longer as useful as in the past, and how to optimize power and performance in both the data centre and at the edge.

Speaker: Jens Stapelfeldt (AMD)

TCA_DESY_ZeroDarkSilicon_6Dec .pdf

17:30 → 18:00 Discussion

Wednesday 7 December

09:00 → 10:30 Session 3

Convener: Axel Winter (IPP)

09:00 First application of MicroTCA.4 on HEPS

HEPS is a 4th generation 6GeV new synchrotron radiation
light source in China. A 500 MeV Linac has been installed and ready for
beam in the past year. The MicroTCA.4 based Low Level RF control and
timing system for the Linac will be presented.

Speaker: Xinpeng Ma (IHEP)

20221207- First application of MTCA on HEPS.pdf

09:15 Status of MicroTCA at J-PARC in 2022

The number of the MicroTCA systems in Japan Proton Accelerator Research Complex (J-PARC) is steadily increasing. The LLRF control system of the main ring (MR) was fully replaced with the new system based on MicroTCA.4. The R&D of the LLRF systems for the UHF and L-band parts of the future muon linac has been started. The systems employ the COTS RFSoC AMCs, contrary to the other applications in J-PARC that employ custom AMCs. The status and future plan of the MicroTCA application in J-PARC are presented.

Speaker: Fumihiko Tamura (J-PARC Center, Japan Atomic Energy Agency)

MTCAWS_2022_tamura_J-PARC_status.pdf

09:30 Adaptive Computing, a Disruptive Technology - AMD Unified AI Stack

In the last few years, the programmable hardware industry has moved from evolution to revolution, both in hardware architectures and software design methodologies. The introduction of hardware configurable VLIW processor arrays has blurred the lines between FPGA and other digital signal processing technologies. Encompassed by the umbrella term “Adaptive Computing”, these hybrid computational elements such as AMD (Xilinx) Versal’s AI Engines, are capable of performance far beyond what SIMD and VLIW processors can achieve. In this talk, we will discuss the architectural innovations of the AI Engines, as well as the development methodology needed to program them.
The talk will give some outlook to the AMD road map and the progress on a unified AI Stack covering CPUs, GPUs and Adaptive Computing devices.

Speaker: Jens Stapelfeldt (AMD)

AMD_DESY_AIStack_7Dec_HH.pdf

09:45 Overview of MicroTCA usage at European XFEL

The European X-Ray Free-Electron Laser Facility (European XFEL) is a 3.4 km long X-ray Free-Electron Laser facility with a superconducting, linear accelerator and three undulator beam lines, with two new on the way. User experiments have taken place since September of 2017; nowadays, typically 3 experiments run in parallel, one in each beam line.

In this overview, we present how MicroTCA based solutions are used in our facility. The platform is at the centre of timing distribution, data processing from large 2D detectors, fast digitization and processing of pulse signal. We will also talk about our efforts in integrating new solutions and how these could bring the platform closer to the user experiments requirements and communicate with other platforms used in the facility.

Speaker: Bruno Fernandes (European XFEL)

mtcaWorkshop2022_BF.pdf

10:00 Update on LISA Phasemeter based on MicroTCA as ground-support equipment

The Universität Hamburg, in collaboration with DESY, is developing an electrical ground-support equipment phasemeter, or phasemeter simulator, based on the MicroTCA.4.1 standard, for the space-based gravitational-wave detector LISA, funded by the German Aerospace Agency (DLR).
The main task of the phasemeter is to extract the phase of various laser interferometer beat note signals with microcycle precision at frequencies between 0.1 mHz and 1 Hz. Additional functions include the readout and generation of ranging and data communication sidebands, frequency control of the lasers and signal acquisition. The development is conducted in parallel to, and in collaboration with, the development of the flight hardware phasemeter and the simulator will be made available to the partners within the LISA consortium for the assembly, integration, verification and testing (AIVT) phase of the mission and for the technology development of payload items.
We present the system design, results of a custom phase fidelity testing setup and the status of our hardware development.

Speaker: Christian Domenic Darsow-Fromm (UNI/EXP (Uni Hamburg, Institut fur Experimentalphysik))

lisa-egse-pm.pdf

10:15 Next Generation MicroTCA.4 from a Crate point of view

The PICMG Working Group, defining PCIe Gen4 and 5 as well as 100 GbE for MicroTCA, is close to finish the specification. What does these changes mean for the Crate? This talk gives an overview about the changes and additions to the specification for the data transmission line and how this influences the backplane. To accommodate the high speed switches the power to the MCH’s and the Cooling Units gets increased.
The presentation shows how this additional power can improve the cooling capability of current crates and which architectures can be realized to optimize the Crate cooling.

Speaker: Christian Ganninger (nVent SCHROFF)

2022-12-06 - Next Generation MTCA.4 from a Crate point of view.pptx

10:30 → 11:00 Coffee Break

11:00 → 12:30 Session 4

Convener: Tobias Hoffmann (Helmholtzzentrum für Schwerionenforschung GSI GmbH)

11:00 MicroTCA in industry applications

The presentation will describe a conceptional approach, how MTCA could be used in industrial applications, it will also show methods to optimize costs per system.
It will highlight concepts for optimized system with basic functions and ease of operations. Existing AMC products can be used within those systems.

Speaker: Thomas Holzapfel (powerBridge Computer)

2022-11-21 MTCA Konzept fuer Industrie.pdf

2022-11-21 MTCA Konzept fuer Industrie.pptx

11:15 Obsolescence Management regarding the Renesas 8V54816ANLG low jitter clock multiplexer and future solutions for the NAT-MCH

The low jitter clock multiplexer 8V54816ANLG from Renesas (ex. IDT) is a well recognized silicon used with many applications in science and industry whenever the clock distribution inside a MicroTCA system requires maximum flexibility regarding multiple possible clock sources and the ability to switch among these at run-time.

Its end of life with a last time buy date in 2023 and the fact that there is no 1:1 replacement available today requires that MicroTCA component vendors develop strategies to help customers maintain their current applications and explore option for future upgrades.

By the example of the NAT-MCH and its associated clock modules this presentation will explore a go-forward strategy and the impact on the future use of the product and on the applications it is used in.

Speaker: Heiko Körte (N.A.T.)

Obsolescence Management regarding the Renesas 8V54816A low jitter clock multiplexer and future solutions for the NAT-MCH.pdf

11:30 Considerations on MPSoC-based AMCs for Users and Developers

In the past years many MPSoC-based AMCs have been released in order to replace old FPGA-based AMC boards. The presence of Processing System and Programmable Logic on the same chip offers the syncrothron users several advantages but it can also hold back the development and operation of new projects due to its complex architecture.
This contribution aims to present some of the many possible features that can be exploited using the MPSoC-based DAMC-FMC2ZUP board by CAEN ELS, especially tailored for syncrothron operations, alongside with our idea of CI/CD development which simplifies build and deployment of firmware and software for MPSoC-based AMCs.

Speaker: Paolo Scarbolo (CAENels)

2022_MTCA_Workshop_CAENELS_Scarbolo.pdf

11:45 Uplink options from MicroTCA to external systems

MicroTCA systems are no “island solutions”: one typical requirement is to send data acquired by an MicroTCA system to an external server or any other compute platform along with providing precision timing information to the world external to a MicroTCA system.

On the one hand, Ethernet is the de-facto standard to communicate with the server or PC domain. On the other hand Ethernet is a non-deterministic media and thus transmitting time-critical data could easily set up very specific requirements which are not easy to meet and which are not always plug & play.

To understand the requirements for a working interconnection between a MicroTCA and any other system, this presentation will provide an overview about what is possible using Ethernet and PCIe today, the pro’s and con’s, the impacts from time critical aspects as well as likely trends for the future.

The presentation will look at the different options using a dedidcated PrAMC, the MCH and special I/O boards in more detail.

Summary:
Mature uplink and interoperability between different technology is crucial in science and industry. The presentation wil shed some light on what is available today and might be in the future, what are the different advantages and limits and how to serve different markets with cost effective solutions in the future.

Speaker: Herbert Erd (N.A.T GmbH)

Uplink options for MTCA no-NDA HE_final-II .pptx

12:00 High Performance Local Oscillator Generation in MicroTCA.4 and Main Oscillator Module with sub-fs Resolution

KVG Quartz Crystal Technology GmbH is a professional frequency control products manufacturer, focusing on research, development, production and sales. High-end crystal oscillators are our specialty. We work together with DESY for the production and test of the DeRTM-LOG module and in the near future also for Master Oscillator (MO) module. The DeRTM-LOG is a MicroTCA.4 compliant and a multi-channel low noise local oscillator generator and high frequency signal and clock fan-out module. Currently the DeRTM-LOG1300 and DeRTM-LOG1500 are under production. The MO module can provide different fixed frequencies with excellent short-term noise below 1fs and long-term stability and high-power output. Besides, diagnostic units for various functions are available.

Speaker: Jiaoni Bai (KVG Quartz Crystal Technology GmbH)

KVG - uTCA12.2022-Presentation.pdf

12:15 The Artix-7 based SIS8172 MicroTCA.4 FMC Carrier

The new SIS8172 FMC carrier in MicroTCA.4 form factor is a versatile digital I/O board, which was developed with a variety of accelerator controls and beam instrumentation applications in mind. While the quad SFP+ front panel interface can be used for inter-crate and long-distance point to point communication, most use cases will employ the Zone 3 D1.0 interface to interface to custom rear transition modules. The HPC FMC site can be used to complement the functionality with COTS or custom FMCs.
The overall design and the building blocks of the firmware framework of the SIS8172 card will be presented.

Speaker: Matthias Kirsch (Struck Innovative Systeme GmbH)

struck-mtcaws-22.pdf

12:30 → 13:30 DESY Tour

12:30 → 14:00 Lunch

14:00 → 15:30 Session 5

Convener: Christian Ganninger

14:00 The role of Libera Brilliance+ in developing the new MicroTCA.4 BPM system for PETRA IV

I-Tech and DESY are developing a BPM electronics prototype on MicroTCA.4 platform for Petra IV TDR. The new prototype is based on the Libera Brilliance+ BPM system (LB+), and relies on the knowledge, expertise and maturity level of the ~15 years' worth of LB+ development. While the LB+ is based on the MicroTCA.0 technology, it is not 100% MicroTCA.0 nor MicroTCA.4 compatible, mainly due to the still emerging MicroTCA.x standard details at the time of the LB+ conceptualization.
The impact of the LB+ heritage, both in terms of RF electronics, as well as the application and framework maturity on the porting to the new MicroTCA.4 based BPM prototype is discussed. The similarities and differences of both platforms are discussed as well. Regardless of the new external (in-tunnel) switching concept being used, it was exactly the LB+ maturity that minimized the required porting effort, and most importantly, minimized the risks and enabled the short time-to-prototype - a strategy that gave us the opportunity to deliver the prototype in due time.

Speaker: Aleš Bardorfer (i-tech)

BRTM_BPM_Petra4_I-Tech_2022.pdf

14:15 Beam Position Monitoring using MicroTCA for Diamond-II

Diamond Light Source is preparing to replace the synchrotron injector and storage ring to upgrade the facility into a fourth-generation light source. This new machine, Diamond-II, requires faster beam diagnostics to feed improved feedback systems, enabling a significant reduction in beam emittance. Data rates increasing from 10 kHz to 100 kHz has led us to develop an in-house solution based on the MicroTCA platform. For Diamond-II, x-ray beam position monitors will be included in the same feedback systems as electron beam position monitors, so the ability to integrate them side-by-side in the same shelf is convenient.
This paper will present the design of the standard cell diagnostics shelf including the structure of the communications interfaces.

Speaker: Laurence Stant (Diamond Light Source)

Diamond_II_Diagnostics_MTCAWS22.pdf

Diamond_II_Diagnostics_MTCAWS22.pptx

14:30 MicroTCA based Fast Orbit Feedback System for PETRA IV

PETRA IV is the upcoming low-emittance, 6 GeV, fourth generation light source at DESY Hamburg. Fast Orbit Feedback (FOFB) system for PETRA IV is planned to perform orbit correction for the full range of disturbance spectrum, i.e. from quasi-DC up to 1 kHz. A total of 789 beam position monitors (BPMs) and 522 fast correctors will be available. A large Multi-Input Multi-Output (MIMO) system is planned in an extended star topology.

In this presentation, the FOFB system design based on MicroTCA components will be presented, allowing to cope with 10-fold larger system as currently operated at PETRA III at significantly reduced latency.

Speaker: Burak Dursun (DESY - MSK)

PIV_FOFB_MTCAWS2022.pdf

14:45 Status of FOFB upgrade at SOLEIL

The upgrade of SOLEIL Fast Orbit Feedback is scheduled for 2023. For this project, a new platform based on MTCA is under development, with dedicated FPGA firmware, a custom RTM and a control software stack. To speed up development, we decided to use DESY FWK and ChimeraTK. We will review and comment the status of the several components of this platform.

Speaker: Romain Broucquart (Synchrotron SOLEIL)

MTCAWS22.pdf

15:00 Conceptual Design of the Multi-Bunch Feedback for the Synchrotron Radiation Source PETRA IV based on the Xilinx Zynq UltraScale+ RFSoC

PETRA IV will be a new, fourth-generation, high-brilliance synchrotron radiation source in the hard X-ray range. To keep the emittance low at high beam current an active feedback system to damp transverse multi-bunch instabilities is required. The particular challenge to the system is the very low-noise, while maintaining high bandwidth, which is defined by the 2 ns bunch spacing.
We present the conceptual design of the transverse multi-bunch feedback (T-MBFB) system. An overview is given on the hardware, which is based on the MicroTCA.4 standard. Using high-speed Zynq UltraScale+ RFSoC RF data converter enables direct sampling of pulses from beam pick-ups, which removes the necessity for down-converters. Powerful digital signal processing in the FPGA allows not only for the effective feedback implementation, but also for developing versatile tools for the machine diagnostics.

Speaker: Szymon Jablonski (MSK (Strahlkontrollen))

Conceptual Design of the Multi-Bunch Feedback for the Synchrotron Radiation Source PETRA IV based on the Xilinx Zynq UltraScale+ RFSoC.pdf

Conceptual Design of the Multi-Bunch Feedback for the Synchrotron Radiation Source PETRA IV based on the Xilinx Zynq UltraScale+ RFSoC.pptx

15:15 Fast Orbit Feedback Hardware for the Sirius Light Source

Sirius Fast Orbit Feedback (FOFB) system came into regular operation for users in November 2022. Its hardware architecture makes extensive use of MicroTCA.4 resources such as backplane clocks, triggers, multigigabit communication and RTM slot for supplying current to the fast corrector magnets.
An overview of the hardware components of the system, including BPMs, FOFB Controllers and Power Supplies will be presented, emphasizing the updates on the last AMC FMC Carrier and RTM-LAMP (FOFB power supply) hardware releases. The designs are publicly available under an open hardware license.

Speaker: Augusto Fraga Giachero (CNPEM / LNLS)

mtca-presentation-2022.pdf

15:30 → 16:00 Coffee Break

16:00 → 17:30 Session 6

Convener: Thomas Holzapfel (Industry Partner)

16:00 Keynote: Future Trends and Technologies of CPU’s & FPGA’s

As advancements in technologies continue to occur, component capabilities utilized in driving these advancements must continue to evolve.
These advancements drive the need for new considerations in consumption of these technologies. These considerations may be as simple as acceptable I/O voltages at given silicon process geometries to more advanced capabilities of tight coupling of CPU and accelerations technologies utilized to secure or improve a particular application’s performance, such as Artificial Intelligence or Machine Learning algorithms. In this keynote, Intel’s Senior Platform Architect and Principal Engineer in the Networking and EDGE division, Dirk Blevins, shares the impact to Intel’s CPU and FPGA products emanating from these future technology trends.

Speaker: Dirk Blevins (Intel)

Intel_microTCA_Session.pdf

16:30 Upgrade of the Injection Kicker Control System utilizing MicroTCA at the Spallation Neutron Source

The Injection Kicker system at the Spallation Neutron Source is responsible for minimizing the average beam current and space charge. This is accomplished through configurable waveforms that are stored and sent to the Injection Kicker Magnet Power Supplies at 60Hz by the control system. These waveforms then must be verified at the beam repetition rate by a monitoring system that is connected to the SNS Machine Protection System. Both the waveform generator and waveform monitor systems are required by the SNS Operating Envelope for any operation above 100kW. Due to obsolescence and spare concerns these systems reached a point of requiring an upgrade. MicroTCA is the platform of choice for the SNS controls modernization strategy and therefore was the choice for these upgrades.

Speaker: Thomas Justice

DESY_2022_InjKicker.pptx

16:45 A cost-effective Module for Divertor Bolometer Diagnostics

Various Advanced Mezzanine Cards (AMCs) are developed based on the MicroTCA.4 technology. The standard always requires basic functionality including: Module Management and Rear-Transition Module Controllers, fabric interface, power supply, clock and synchronization. The module usually provides some programable resources that can be used by the final application.

A second version of cost-effective but effective AMC module was developed for the divertor bolometer diagnostics system of W7-X stellarator. The rationale for this project was to develop a very simple module providing basic functions required in many projects in a short period of time. The AMC module is equipped with Xilinx Artix-7 FPGA, PCIe x4, gen. 2 fabric interface, TCLK and MLVDS lines and Zone 3 digital connection.
Moreover, the module has 4 programmable digital lines on the front panel. The development and production costs were further optimised using the smart Module Management Controller developed at Lodz University of Technology, Department of Microelectronics and Computer Science.

Speakers: Aleksander Mielczarek (Lodz University of Technology, Department of Microelectronics and Computer Science), Axel Winter (], Max-Planck-Institut for Plasmaphysics)

Basic-AMC-v2.pptx

17:00 Recent developments on the Multi-axis Motion Controller in MicroTCA.4

DESY has developed a MicroTCA.4-based multi-axis motion controller: DAMC-MOTCTRL. This board is a contribution to the ecosystem since it enables controlling motion in big experiments from within the MicroTCA crate. It is designed to move up to 48 stepper motors per card in parallel - which means each card replaces up to 6 VME cards. One major benefit is the possibility to aggregate multiple cards inside the MicroTCA crate and across the DESY campus. This allows for performing position-synchronous data acquisition. Using the MicroTCA features, this device can interact with virtually any other MicroTCA card and trigger user-programmable actions.

The bring-up of the first hardware prototypes has finished successfully. The focus is now shifting toward applications. The needed firmware development was done in parallel with the hardware design. While it initially used the ZCU102 development kit for testing and demonstration, it can now be ported to the actual target hardware. The complete firmware is based on the open-source FPGA framework FWK. It takes full advantage of the heterogeneous system design: It uses the ARM-based Processing System (MPSoC) to interface the board to high-level instrument control software (e.g. Certified Scientific Software - spec) while a real-time FPGA handles multiple synchronous motor-control sequences in parallel.

In this talk, the hardware and firmware design, their current states and the latest developments will be presented.

Speaker: Michael Fenner (MSK (Strahlkontrollen))

mtcaws-2022-web2.pdf

17:15 Userspace Hardware Abstraction Layer for PCIe devices

In order to simplify the software architecture that has been developed for the Sirius Beam Position Monitors (BPM) and Fast Orbit Feedback (FOFB) systems, currently running on MicroTCA crates with FPGA devices communicating over PCIe, a new library and accompanying EPICS IOC have been developed. The hardware interaction is done entirely in userspace by means of the Linux sysfs filesystem; library users have an interface that tries to provide and receive the data in the most digestible format; and the library interacts directly with the hardware. Due to the direct coupling between the library and the hardware, only one client can be interacting with the hardware at a time; the goal is that a long running software, typically an IOC, will be the main user of the library, in order to expose its functionalities to multiple users. The resulting library was called μHAL and is open source. As an added benefit, changes to this base layer have also led to considerably shorter and simpler IOC implementations, to the point that adding up the lines of code for a given module in both μHAL and the new IOC results in around half the lines of code for that same module in the existing architecture.

Speaker: Érico Nogueira Rolim (LNLS)

mtca_presentation_erico_2022.pdf

17:30 → 18:00 Discussion

18:15 → 19:00 Bus transfer from CFEL to Überseebrücke

19:00 → 22:30 Hamburg Harbour Tour via MS Hammonia with Workshop Dinner

22:30 → 23:00 Bus transfer from Überseebrücke back to DESY

Thursday 8 December

09:00 → 10:30 Session 7

Convener: Jan Marjanovic (Atom Computing, Inc.)

09:00 Timer & Timing for MicroTCA

Content:
Timing aspects such as precision, synchronization and distribution are more and more getting critical, not only for applications in science but also for those in industry. Beside application specific precision timing modules the global approach through IEEE1588 is getting more and or attention.

The presentation will highlight the clocking options for a new (NG-MTCA ready) MCH Clock module providing IEEE1588 support and will compare these to dedicated precision timer modules. Also aspects such as the requirements for the connected AMCs and the different options for external clocks and triggers are covered.

Summary:
Precise and distributable timing is important for many applications in science and industry.
The presentation will provide a brief comparison of the timing options available for different requirements and precision.

Speaker: Herbert Erd (N-A.T GmbH)

Timer and timing for MTCA-HE-final.pptx

09:15 Status report on the PETRA IV timing system development

At DESY, developments towards the fourth-generation synchrotron light source PETRA IV are ongoing in its technical design phase. This machine upgrade foresees a complete renewal of the accelerator and its electronics for controls, including the timing and synchronization system. As a platform choice for the hardware, MicroTCA.4 has been chosen to become the new baseline.
This report will briefly summarize the new timing system concept for
the storage ring and its pre-accelerator chain. Furthermore, we will present the current status of the hardware and firmware development of the MicroTCA.4-based AMC, the DAMC-X3TIMER.

Speaker: Hendrik Lippek (MSK (Strahlkontrollen))

X3Timer_Slides_11thMTCA_Workshop.pdf

X3Timer_Slides_11thMTCA_Workshop.pptx

09:30 Overview of DMCS Projects and MicroTCA.4 Developments

The Lodz University of Technology, Department of Microelectronics and Computer Science is involved in the development of MicroTCA.4, MicroTCA.4.1 and the future standards from 2007 onwards. Since that time, we have developed various MicroTCA.4 components including Intelligent Platform Management, Advanced Mezzanine Cards (AMCs), Rear Transition Modules (RTMs) for data acquisition and processing systems used in numerous accelerators and fusion projects.
The presentation discusses selected projects currently performed at our department based on the MicroTCA.4 technology.
Firstly, a scalable real-time framework supporting various camera standards based on the MicroTCA.4 technology will be presented as an example of a powerful image acquisition and processing system dedicated for large-scale physics projects, such as ITER, Wendelstein 7-X or Eu-XFEL.
Secondly, the firmware upgrade supporting all HMP.1 commands and a smart MMC solution is demonstrated on the example of a cost-effective but efficient AMC module that we have developed for the W7-X stellarator.
Finally, the progress of developing the high-power piezo driver (HPD-200) for the European Spallation Source (ESS) accelerator will be presented as an instance of enormous challenge breaking the limitations of the MicroTCA specification.

Speaker: Dariusz Makowski (Lodz University of Technology)

D.Makowski_Overview of DMCS Projects_2022.12.07_v2.pdf

09:45 MicroTCA at W7-X: Update and first results

W7-X restarted operation in September of 2022 after a 4-year shutdown. Extensive work was done during that time, including the installation of an actively cooled divertor. This necessitated a sophisticated protection system, to ensure that the internal components of the machine do not overheat. The key DAQ components are high-fidelity infrared and optical cameras. This system alone consist of more than two dozen cameras with multiple GBit/s data rates each and the requirement for real-time processing. In order to achieve this, a generic framework was created, which can integrate different camera hardware standards (CameraLink, CameraLink HS and others) and all cameras that are GenICam compliant. This talk will give an overview of the system, present its implementation and highlight the initial results obtained for the whole system in plasma operation.

Speaker: Axel Winter (Max Planck Institute for Plasma Physics)

mtca 2022.pptx

10:00 Open Source FPGA Framework at MSK-DESY

For the past two years, the FPGA team at the MSK group of DESY has been working on modernizing and preparing many existing tools and IPs for open-source access. This talk focuses on giving the latest status on the project while giving concrete use case examples.

Speaker: Cagil Guemues (DESY)

mtca_ws_2022.pdf

10:15 Digital Signal Processing and Its Applications for the Energy Dispersive X-Rays Detectors

In todays advanced and digital world traditional analog signal acquisition and processing are gradually shifting to digital domain to meet the needs of the hour. In the field of energy dispersive x-rays detectors traditional analog signal processing involves a pre-amplifier to amplify the signal, a shaping amplifier to detect the energy of the incident photon, and a multichannel analyzer (MCA) to generate the energy spectrum.

The use of digital signal processing allows to enhance the system, achieve more flexibility, reduced noise by adding advanced digital and faster data processing methods, which will enable higher counting rates above million counts per second.

With digital signal processing the output of the preamplifier is digitized and all further processing is done in a field programmable gate array (FPGA).

Currently available devices in the market perform the signal processing step either in digital signal processors (DSPs) or FPGAs. Most of these devices such as the Struck SIS3302 use trapezoidal filtering, which gives good energy resolution at large shaping times.

In our presentation, we will show different algorithms for data preprocessing, shaping and postprocessing. We will show that by preprocessing the data, we can get better energy resolution at shorter shaping times; thus, it will allow good energy and time resolution at high count rates. To enhance the quality of signal, signal preprocessing methods such as moving average filter, savitzky-golay filter and others will be shown. For signal shaping, methods such as trapezoidal filter, triangular filter and postprocessing methods such as deconvolution will also be demonstrated. To enhance the detection of photon arrival, machine learning algorithm such as Artificial Neural Network (ANN) will be discussed. The results of the methods will be compared by applying them to identical experimental raw data. Based on theoretical and experimental results an analytical comparison of the methods will be carried out for the implementation. We will also show the Graphical User Interface (GUI) for the hardware to communicate with the MicroTCA crate.

Speaker: Sarmad Adeel (FS-PETRA-D (FS-PET-D Fachgruppe P24 (Chem.Cryst.)))

10:30 → 11:00 Coffee Break

11:00 → 12:30 Session 8

Convener: Dariusz Makowski (Lodz University of Technology)

11:00 DESY MMC Solutions – New features and more modularity for an optimal AMC management

The DMMC-STAMP SoM (DESY Module Management Controller System on a Module) provides a full management solution for operating a target AMC (Advanced Mezzanine Card®) in a MicroTCA® based ecosystem. Equipped with a pre-installed firmware which is covering all management features that are mandatorily required by the MicroTCA® specifications, the DMMC-STAMP SoM is a ready to use drop in solution. By using the optional DMMC Software Development Kit (DMMC-SDK) users can easily enable additional AMC board specific features like serial-over-IPMI, in-system firmware update or PMBUS™ power management.

For targeting a modern System on a Chip (SoC) based AMC the DMMC-STAMP SoM hardware is capable to implement additional and very useful advanced management features. For example, this can be the exchange of critical MicroTCA system information with the operating system (OS) running on the AMC SoC, the remote access of AMC FPGAs/SoCs via IPMI or a proper OS shutdown sequence before the AMC payload power gets switched off.

This contribution gives a summary of the latest MicroTCA Technology Lab DMMC-STAMP developments for targeting modern System on a Chip (SoC) based AMCs requested by the user’s community.

Speaker: Sven Stubbe (ITT (Business Development Office))

2022-12-08_DESY_MMC_Solutions.pdf

2022-12-08_DESY_MMC_Solutions.pptx

11:15 Teledyne: Digitizers for Big Physics

Speaker: Kacper Matuszynski (Teledyne SP Devices)

11:30 Extension of the Python Bindings for the ChimeraTK DeviceAccess Library

ChimeraTK is an open-source software toolkit that aims to facilitate the design of control applications for register-based hardware. One of the included libraries is DeviceAccess. It offers one common interface for a multitude of different devices and their respective protocols. It enables the user to focus on the task at hand. The application can be independent of the backend like DOOCS, EPICS, or PCIe. 

The Python bindings for the DeviceAccess library have been updated. The functionality now mirrors its C++ counterpart. With the introduction of register accessors, a lot of housekeeping has been moved from the user to the library. The update also offers new constructs for blocking reads, to delegate control to the register instead of constantly polling it. The refactoring also includes complete documentation and the introduction of Python type-hints and function annotations to streamline the programming workflow in the IDE.

Speaker: Christian Willner (DESY)

MTCAWS_Christian_Willner.pdf

11:45 Fast and Continuous ADC sampling using TEWS TAMC532 and STRUCK SIS8303KU in synchronous and asynchronous ways.

Continuous data acquisition in recent times has become more popular.
Implementation of the continuous ADC sampling with data storing has some restrictions, such as short data acquisition time and limited CPU memory.
Our experiences and test of the fast and continuous ADC sampling using TEWS TAMC532 and STRUCK SIS8303KU in synchronous and asynchronous ways is presented.

Speaker: Ludwig Petrosyan (DESY)

contsampling.pdf

12:00 Yocto Embedded Linux for SoC based AMCs – Latest developments for demanding applications

The MicroTCA Technology Lab provides a full-blown Yocto Linux system for the latest DESY SoC based AMC (Advanced Mezzanine Card®) developments which can be tailored to respective user applications. The related code repositories (called "layers" in the Yocto world) have been refactored and consolidated to increase interoperability and to minimize redundancy.

Including the latest developments, the BSP provided by the MicroTCA Technology Lab allows to build Linux images for different AMCs, targeting different SoC architectures with different Programmable Logic (PL) bitstreams, while using the same set of layers. For retrieving critical MicroTCA management information at application level (e.g. calibrate ADCs by using on-board sensor information or issue a Linux Operating System shutdown when the AMC handle gets pulled) it also features a data interface to the AMCs Module Management Controller (DMMC-STAMP). The MicroTCA Technology Lab Yocto BSP layers are released as open source on GitHub and integrated with the DESY Firmware Framework (FWK).

This contribution gives a summary of the latest MicroTCA Technology Lab developments in Yocto Linux and outlines application examples running on the latest DESY AMCs (e.g. DAMC-FMC2ZUP, DAMC-FMC1Z7IO and DAMC-DS812ZUP).

Speaker: Patrick Huesmann (ITT (Business Development Office))

mtcaws22-yocto-linux.pdf

12:15 Closeout

Speaker: Holger Schlarb (MSK (Strahlkontrollen))

2022-12-08 11th-MTCAWS_close_out.pdf

12:30 → 14:00 Lunch